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參數(shù)資料
| 型號： | AD8332ACPZ-R2 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP VGA PREAMP PROGR 32-LFCSP |
| 標準包裝： | 250 |
| 系列： | X-AMP® |
| 類型： | 可變增益放大器 |
| 應用： | 信號處理 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 配用： | AD8332-EVALZ-ND - BOARD EVAL FOR AD8332 |
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AD8331/AD8332/AD8334
Rev. G | Page 33 of 56
When selecting overload protection, the important parameters
are forward and reverse voltages and trr (or
τrr). The Infineon
BAS40-04 series shown in Figure 88 has a
τrr of 100 ps and a VF
of 310 mV at 1 mA. Many variations of these specifications can
be found in vendor catalogs.
LAYOUT, GROUNDING, AND BYPASSING
Due to their excellent high frequency characteristics, these
devices are sensitive to their PCB environments. Realizing
expected performance requires attention to detail critical to
good, high speed, board design.
A multilayer board with power and ground planes is recom-
mended with blank areas in the signal layers filled with ground
plane. Be certain that the power and ground pins provided for
robust power distribution to the device are connected. Decouple
the power supply pins with surface-mount capacitors as close as
possible to each pin to minimize impedance paths to ground.
Decouple the LNA power pins from the VGA supply using
ferrite beads. Together with the capacitors, ferrite beads
eliminate undesired high frequencies without reducing the
headroom. Use a larger value capacitor for every 10 chips to
20 chips to decouple residual low frequency noise. To minimize
voltage drops, use a 5 V regulator for the VGA array.
Several critical LNA areas require special care. The LON and
LOP output traces must be as short as possible before connecting
to the coupling capacitors connected to Pin VIN and Pin VIP.
RIZ must be placed near the LON pin as well. Resistors must be
placed as close as possible to the VGA output pins, VOL and
VOH, to mitigate loading effects of connecting traces. Values
are discussed in the Output Decoupling section.
Signal traces must be short and direct to avoid parasitic effects.
Wherever there are complementary signals, symmetrical layout
should be employed to maintain waveform balance. PCB traces
should be kept adjacent when running differential signals over a
long distance.
MULTIPLE INPUT MATCHING
Matching of multiple sources with dissimilar impedances can be
accomplished as shown in Figure 89. A relay and low supply voltage
analog switch can be used to select between multiple sources
and their associated feedback resistors. An ADG736 dual SPDT
switch is shown in this example; however, multiple switches are
also available and users are referred to the Analog Devices
Selection Guide for switches and multiplexers.
03
19
9-
09
0
INH
LNA
5
200
50
LMD
LOP
ADG736
LON
0.1F
18nF
280
1.13k
AD8332
5
SELECT RIZ
Figure 89. Accommodating Multiple Sources
DISABLING THE LNA
Where accessible, connection of the LNA enable pin to ground
powers down the LNA, resulting in a current reduction of about
half. In this mode, the LNA input and output pins can be left
unconnected; however, the power must be connected to all the
supply pins for the disabling circuit to function. Figure 90 illustrates
the connections using AD8331 as an example.
03
19
9-
0
89
15
16
20
17
18
19
8
7
6
5
1
4
3
2
9
13
10
COMM
VIP
LOP
COML
LMD
LON
VPSL
INH
COMM
ENBV
ENBL
GAIN
0.1F
HILO
+5V
NC
VOH
VOL
VOUT
VPOS
+5V
14
11
12
VCM
RCLMP
NC
VIN
0.1F
AD8331
MODE
GAIN
MODE
VCM
HILO
VIN
RCLMP
Figure 90. Disabling the LNA
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