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| 型號(hào)： | AD872AJD |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 3/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 10MSPS 28-CDIP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 10M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 7 |
| 功率耗散（最大）： | 1.3W |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-CDIP（0.605"，15.37mm） |
| 供應(yīng)商設(shè)備封裝： | 28-CDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 2 個(gè)單端，雙極；1 個(gè)差分，雙極 |
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REV. A
–11–
AD872A
The wide input bandwidth and superior dynamic performance
of the input THA make the AD872A suitable for undersam-
pling applications where the input frequency exceeds half the
sample frequency. The input THA is designed to recover rap-
idly from input overdrive conditions, returning from a 50%
overdrive in less than 40 ns.
Because of the THA’s exceptionally wide input bandwidth,
some users may find the AD872A is sensitive to noise at fre-
quencies from 10 MHz to 50 MHz that other converters are
incapable of responding to. This sensitivity can be mitigated by
careful use of the differential inputs (see previous paragraphs).
Additionally, Figure 18 shows how a small capacitor (10 pF-
20 pF for 50
terminated inputs) may be placed between V
INA
and VINB to help reduce high frequency noise in applications
where limiting the input bandwidth is acceptable.
1
2
VINA
VINB
AD872A
1V
10 OR 20pF
Figure 18. Optional High Frequency Noise Reduction
The AD872A will contribute its own wideband thermal noise.
As a result of the integrated wideband noise (0.26 LSB rms,
referred-to-input), applying a dc analog input may produce
more than one code at the output. A histogram of the ADC
output codes, for a dc input voltage, will be between one and
three codes wide, depending on how well the input is centered
on a given code and how many samples are taken. Figure 8
shows a typical AD872A code histogram, and Figure 9 illus-
trates the AD872A’s transition noise.
REFERENCE INPUT
The nominal reference input should be 2.5 V, taken with re-
spect to REFERENCE GROUND (REF GND). Figure 19 il-
lustrates the equivalent model for the reference input: there is
no clock or signal-dependent activity associated with the refer-
ence input circuitry, therefore, no “kickback” into the reference.
1
2
REF IN
REF GND
AD872A
5k
( 20%)
AVSS
Figure 19. Equivalent Reference Input Circuit
However, in order to realize the lowest noise performance of the
AD872A, care should be taken to minimize noise at the refer-
ence input.
The AD872A’s reference input impedance is equal to 5 k
(
±20%), and its effective noise bandwidth is 10 MHz, with a
referred-to-input noise gain of 0.8. For example, the internal
reference, with an rms noise of 28
V (using an external 1 F
capacitor), contributes 24
V (0.05 LSB) of noise to the transfer
function of the AD872A.
The full-scale peak-to-peak input voltage is a function of the
reference voltage, according to the equation:
(V
INA = VINB ) Full Scale = 0. 8 × (VREF – REF GND )
Note that the AD872A’s performance was optimized for a 2.5 V
reference input: performance may degrade somewhat for other
reference voltages. Figure 20 illustrates the S/(N+D) perfor-
mance vs. reference voltage for a 1 MHz, –0.5 dB input signal.
Note also that if the reference is changed during a conversion,
all three conversions in the pipeline will be invalidated.
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
3.1
3.3
3.5
REFERENCE INPUT VOLTAGE – V
75
70
65
60
55
50
S/(N+D)
–
d
B
Figure 20. S/(N+D) vs. Reference Input Voltage,
fIN = 1 MHz, FS = 10 MHz
Table II summarizes various 2.5 V references suitable for use
with the AD872A, including the onboard bandgap reference
(see REFERENCE OUTPUT section).
Table II. Suitable 2.5 V References
Drift (ppm/ C)
Initial Accuracy %
REF43B
6 (max)
0.2
AD680JN
10 (max)
0.4
Internal
30 (typ)
0.4
If an external reference is connected to REF IN, REF OUT
must be connected to +5 V. This should lower the current in
REF GND to less than 350
A and eliminate the need for a
1
F capacitor, although decoupling the reference for noise
reduction purposes is recommended.
Alternatively, Figure 21 shows how the AD872A may be driven
from other references by use of an external resistor. The exter-
nal resistor forms a resistor divider with the on-chip 5 k
resis-
tor to realize 2.5 V at the reference input pin (REF IN). A trim
potentiometer is needed to accommodate the tolerance of the
AD872A’s 5 k
resistor.
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| AD872ASD/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 28-Pin CDIP 制造商:Analog Devices 功能描述:ADC SGL PIPELINED 10MSPS 12-BIT PARALLEL 28CDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk 制造商:Analog Devices 功能描述:CONVERTER - ADC |
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