參數(shù)資料
型號(hào): AD9042ASTZ
廠商: Analog Devices Inc
文件頁數(shù): 20/24頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 41MSPS 44-TQFP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 41M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 3
功率耗散(最大): 735mW
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-LQFP(10x10)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)單端,雙極
產(chǎn)品目錄頁面: 780 (CN2011-ZH PDF)
AD9042
Rev. B | Page 5 of 24
Parameter1, 2
Temp
Test Level
Min
Typ
Max
Units
DIFFERENTIAL NONLINEARITY
25°C
I
1.0
±0.3
+1.0
LSB
(ENCODE = 20 MSPS)
Full
V
±0.4
LSB
INTEGRAL NONLINEARITY
(ENCODE = 20 MSPS)
Full
V
±0.75
LSB
ANALOG INPUT BANDWIDTH
25°C
V
100
MHz
TRANSIENT RESPONSE
25°C
V
10
ns
OVERVOLTAGE RECOVERY TIME
25°C
V
25
ns
1 All ac specifications tested by driving ENCODE and ENCODE differentially; see the Encoding the AD9042 section for details.
2 C1 (Pin 10 on AD9042ASTZ only) tied to GND through a 0.01 μF capacitor.
3 Analog input signal power at 1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed).
4 Analog input signal power at 1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics.
5 Analog input signal power at 1 dBFS; worst spur is the ratio of the signal level to worst spur, usually limited by harmonics.
6 Analog input signal power swept from 20 dBFS to –95 dBFS; dither power = 32.5 dBm; dither circuit used on input signal (see the Overcoming Static Nonlinearities
with Dither section); SFDR is the ratio of converter full scale to worst spur.
7 Tones at 7 dBFS (f1 = 15.3 MHz, f2 = 19.5 MHz); two-tone intermodulation distortion (IMD) rejection is ratio of either tone to worst-third order intermodulation
product.
8 Both input tones swept from 20 dBFS to 95 dBFS; dither power = 32.5 dBm; dither circuit used on input signal (see the Overcoming Static Nonlinearities with
Dither section); two-tone spurious-free dynamic range (SFDR) is the ratio of converter full scale to worst spur.
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