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參數(shù)資料
| 型號： | AD9148-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 55/72頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD9148 |
| 設(shè)計資源： | AD9148-EBZ Schematic AD9148-EBZ BOM AD9148-EBZ Gerber Files |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| DAC 的數(shù)量： | 4 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1G |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 設(shè)置時間： | 20ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9148 |
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Data Sheet
AD9148
Rev. B | Page 59 of 72
ANALOG OUTPUTS
TRANSMIT DAC OPERATION
Figure 77 shows a simplified block diagram of one pair of the
transmit path DACs. The DAC core consists of a current source
array, switch core, digital control logic, and full-scale output current
control. The DAC full-scale output current (IOUTFS) is nominally
20 mA. The output currents from the IOUTx_P and IOUTx_N
pins are complementary, meaning that the sum of the two currents
always equals the full-scale current of the DAC. The digital input
code to the DAC determines the effective differential current
delivered to the load.
The DAC has a 1.2 V band gap reference with an output impedance
of 5 kΩ. The reference output voltage appears on the VREF pin.
When using the internal reference, the VREF pin should be
decoupled to AVSS with a 0.1 F capacitor. The internal reference
should only be used for external circuits that draw dc currents
of 2 A or less. For dynamic loads or static loads greater than
2 A, the VREF pin should be buffered. If desired, an external
reference (between 1.10 V to 1.30 V) can be applied to the
VREF pin.
A 10 kΩ external resistor, RSET, must be connected from
the RESET pin to AVSS. This resistor, along with the reference
control amplifier, sets up the correct internal bias currents for
the DAC. Because the full-scale current is inversely proportional
to this resistor, the tolerance of RSET is reflected in the full-scale
output amplitude.
The full-scale current can be calculated by
×
+
×
=
DAC gain
R
I
SET
OUTFS
16
3
72
VREF
where DAC gain is set individually for the I and Q DACs in
Register 0x30, Register 0x31, Register 0x34, and Register 0x35,
respectively.
For nominal values of VREF (1.2 V), RSET (10 kΩ), and DAC
gain (512), the full-scale current of the DAC is typically 20.16 mA.
The DAC full-scale current can be adjusted from 8.66 mA to
31.66 mA by setting the DAC gain parameter setting as shown
35
0
1000
DAC GAIN CODE
I O
U
TFS
(
mA)
30
25
20
15
10
5
200
400
600
800
08910-
074
Figure 76. DAC Full-Scale Current vs. DAC Gain Code
Transmit DAC Transfer Function
The output currents from the IOUTx_P and IOUTx_N pins are
complementary, meaning that the sum of the two currents always
equals the full-scale current of the DAC. The digital input code
to the DAC determines the effective differential current delivered
to the load. IOUTx_P provides the maximum output current
when all bits are high. The output currents vs. DACCODE for
the DAC outputs are expressed as
OUTFS
N
P
OUT
I
DACCODE
I
×
=
2
_
(1)
IOUT_N = IOUTFS – IOUT_P
(2)
where DACCODE = 0 to 2N 1.
I DAC
IOUT1_P/IOUT3_P
IOUT1_N/IOUT3_N
Q DAC
IOUT2_N/IOUT4_N
IOUT2_P/IOUT4_P
CURRENT
SCALING
I DAC GAIN
Q DAC GAIN
0.1F
10k
I120
VREF
RSET
5k
1.2V
08910-
075
Figure 77. Simplified Block Diagram of the DAC Core
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