參數(shù)資料
型號: AD9219ABCPZRL7-65
廠商: Analog Devices Inc
文件頁數(shù): 3/56頁
文件大?。?/td> 0K
描述: IC ADC 10BIT SRL 65MSPS 64LFCSP
標準包裝: 750
位數(shù): 10
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 408mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極;4 個差分,單極
Data Sheet
AD9219
Rev. E | Page 11 of 56
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VIN + A
VIN – A
AVDD
VIN + D
VIN – D
DRVDD
DRGND
CLK+
CLK–
AVDD
DRVDD
DRGND
AVDD
CSB
SCLK/DTP
SDIO/ODM
PDWN
AVDD
D
+
A
D
A
D
+
B
D
B
D
+
C
D
C
D
+
D
D
DCO
+
DCO
FC
O
+
FC
O–
VI
N
+
B
VI
N
B
VI
N
+
C
VI
N
C
AV
DD
RE
F
T
RE
F
B
VR
EF
SEN
SE
AV
DD
AV
DD
RBI
AS
11
12
10
9
8
7
6
5
4
3
2
1
25
24
26
27
28
29
30
31
32
33
34
35
36
22
21
23
20
19
18
17
16
15
14
13
37
38
39
40
41
42
43
44
45
46
47
48
PIN 1
INDICATOR
EXPOSED PADDLE, PIN 0
(BOTTOM OF PACKAGE)
AD9219
TOP VIEW
0
57
26-
003
NOTES
1. THE EXPOSED PAD MUST BE CONNECTED TO ANALOG GROUND.
Figure 5. 48-Lead LFCSP Pin Configuration, Top View
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
0
AGND
Analog Ground (Exposed Paddle)
1, 2, 5, 6, 9, 10, 27, 32,
35, 36, 39, 45, 46
AVDD
1.8 V Analog Supply
11, 26
DRGND
Digital Output Driver Ground
12, 25
DRVDD
1.8 V Digital Output Driver Supply
3
VIN D
ADC D Analog Input Complement
4
VIN + D
ADC D Analog Input True
7
CLK
Input Clock Complement
8
CLK+
Input Clock True
13
D D
ADC D Digital Output Complement
14
D + D
ADC D Digital Output True
15
D C
ADC C Digital Output Complement
16
D + C
ADC C Digital Output True
17
D B
ADC B Digital Output Complement
18
D + B
ADC B Digital Output True
19
D A
ADC A Digital Output Complement
20
D + A
ADC A Digital Output True
21
FCO
Frame Clock Output Complement
22
FCO+
Frame Clock Output True
23
DCO
Data Clock Output Complement
24
DCO+
Data Clock Output True
28
SCLK/DTP
Serial Clock/Digital Test Pattern
29
SDIO/ODM
Serial Data IO/Output Driver Mode
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