AVDD = 1.8 V, DRVDD = 1.8 V, TMIN
參數(shù)資料
型號(hào): AD9230BCPZ-170
廠商: Analog Devices Inc
文件頁(yè)數(shù): 29/32頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT 170MSPS 56-LFCSP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 170M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 371mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 56-LFCSP-VQ(8x8)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)差分,單極
AD9230
Rev. 0 | Page 6 of 32
SWITCHING SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = 40°C, TMAX = +85°C, fIN = 1.0 dBFS, full scale = 1.25 V, DCS enabled, unless otherwise noted.
Table 4.
AD9230-170
AD9230-210
AD9230-250
Parameter (Conditions)
Temp
Min
Typ
Max
Min
Typ
Max
Unit
Maximum Conversion Rate
Full
170
210
250
MSPS
Minimum Conversion Rate
Full
40
MSPS
CLK+ Pulse Width High (tCH)
Full
2.65
2.9
2.15
2.4
1.8
2.0
ns
CLK+ Pulse Width Low (tCL)
Full
2.65
2.9
2.15
2.4
1.8
2.0
ns
Output (LVDS SDR Mode)1
Data Propagation Delay (tPD)
Full
3.0
ns
Rise Time (tR) (20% to 80%)
25°C
0.2
ns
Fall Time (tF) (20% to 80%)
25°C
0.2
ns
DCO Propagation Delay (tCPD)
Full
3.9
ns
Data to DCO Skew (tSKEW)
Full
0.3
0.1
0.5
0.3
0.1
0.5
0.3
0.1
0.5
ns
Latency
Full
7
Cycles
Output (LVDS DDR Mode)2
Data Propagation Delay (tPD)
Full
3.8
ns
Rise Time (tR) (20% to 80%)
25°C
0.2
ns
Fall Time (tF) (20% to 80%)
25°C
0.2
ns
DCO Propagation Delay (tCPD)
Full
3.9
ns
Data to DCO Skew (tSKEW)
Full
0.5
0.1
0.3
0.5
0.1
0.3
0.5
0.1
0.3
ns
Latency
Full
7
Cycles
Aperture Uncertainty (Jitter, tJ)
25°C
0.2
ps rms
1 See Figure 2.
2 See Figure 3.
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