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| 型號： | AD9238BCP-65EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL WITH AD9238BCP-65 |
| 設(shè)計資源： | AD9238 Eval Brd Gerber File |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 2 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 輸入范圍： | 2 Vpp |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 640mW @ 65MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9238-65 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD9238BCPZ-20-ND - IC ADC 12BIT DUAL 20MSPS 64LFCSP AD9238BCPZ-40-ND - IC ADC 12BIT DUAL 40MSPS 64LFCSP AD9238BCPZ-65-ND - IC ADC 12BIT DUAL 65MSPS 64LFCSP AD9238BSTZRL-40-ND - IC ADC 12BIT DUAL 40MSPS 64LQFP AD9238BCPZRL-65-ND - IC ADC 12BIT DUAL 65MSPS 64LFCSP AD9238BCPZRL-20-ND - IC ADC 12BIT DUAL 20MSPS 64LFCSP AD9238BCPZRL-40-ND - IC ADC 12BIT DUAL 40MSPS 64LFCSP AD9238BSTZ-40-ND - IC ADC 12BIT DUAL 40MSPS 64-LQFP AD9238BSTRL-40-ND - IC ADC 12BIT DUAL 40MSPS 64-LQFP AD9238BST-40-ND - IC ADC 12BIT DUAL 40MSPS 64-LQFP |
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AD9238
Rev. C | Page 10 of 48
TERMINOLOGY
Aperture Delay
SHA performance measured from the rising edge of the clock
input to when the input signal is held for conversion.
Aperture Jitter
The variation in aperture delay for successive samples, which is
manifested as noise on the input to the ADC.
Integral Nonlinearity (INL)
Deviation of each individual code from a line drawn from
negative full scale through positive full scale. The point used as
negative full scale occurs LSB before the first code transition.
Positive full scale is defined as a level 1 LSB beyond the last
code transition. The deviation is measured from the middle of
each particular code to the true straight line.
Differential Nonlinearity (DNL, No Missing Codes)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Guaranteed
no missing codes to 12-bit resolution indicates that all 4,096
codes must be present over all operating ranges.
Offset Error
The major carry transition should occur for an analog value
LSB below VIN+ = VIN. Offset error is defined as the
deviation of the actual transition from that point.
Gain Error
The first code transition should occur at an analog value LSB
above negative full scale. The last transition should occur at an
analog value 1 LSB below the nominal full scale. Gain error is
the deviation of the actual difference between first and last code
transitions and the ideal difference between first and last code
transitions.
Temperature Drift
The temperature drift for zero error and gain error specifies the
maximum change from the initial (25°C) value to the value at
TMIN or TMAX.
Power Supply Rejection
The specification shows the maximum change in full scale from
the value with the supply at the minimum limit to the value
with the supply at its maximum limit.
Total Harmonic Distortion (THD)
The ratio of the rms sum of the first six harmonic components
to the rms value of the measured input signal, expressed as a
percentage or in decibels relative to the peak carrier signal (dBc).
Signal-to-Noise and Distortion (SINAD) Ratio
The ratio of the rms value of the measured input signal to the
rms sum of all other spectral components below the Nyquist
frequency, including harmonics but excluding dc. The value for
SINAD is expressed in dB.
Effective Number of Bits (ENOB)
Using the following formula
ENOB = (SINAD 1.76)/6.02
ENOB for a device for sine wave inputs at a given input
frequency can be calculated directly from its measured SINAD.
Signal-to-Noise Ratio (SNR)
The ratio of the rms value of the measured input signal to the
rms sum of all other spectral components below the Nyquist
frequency, excluding the first six harmonics and dc. The value
for SNR is expressed in dB.
Spurious-Free Dynamic Range (SFDR)
The difference in dB between the rms amplitude of the input
signal and the peak spurious signal, which may or may not be a
harmonic.
Nyquist Sampling
When the frequency components of the analog input are below
the Nyquist frequency (fCLOCK/2), this is often referred to as
Nyquist sampling.
IF Sampling
Due to the effects of aliasing, an ADC is not limited to Nyquist
sampling. Higher sampled frequencies are aliased down into the
first Nyquist zone (DC fCLOCK/2) on the output of the ADC.
The bandwidth of the sampled signal should not overlap
Nyquist zones and alias onto itself. Nyquist sampling
performance is limited by the bandwidth of the input SHA and
clock jitter (jitter adds more noise at higher input frequencies).
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms value
of the peak spurious component. The peak spurious component
may or may not be an IMD product.
Out-of-Range Recovery Time
The time it takes for the ADC to reacquire the analog input
after a transient from 10% above positive full scale to 10% above
negative full scale, or from 10% below negative full scale to 10%
below positive full scale.
Crosstalk
Coupling onto one channel being driven by a (0.5 dBFS) signal
when the adjacent interfering channel is driven by a full-scale
signal. Measurement includes all spurs resulting from both
direct coupling and mixing components.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9238BCPZ-20 | 功能描述:IC ADC 12BIT DUAL 20MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD9238BCPZ-20EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter |
| AD9238BCPZ-250 | 制造商:Analog Devices 功能描述:12-BIT, 20 MSPS/40 MSPS/65 MSPSDUAL A/D CONVERTER - Trays |
| AD9238BCPZ-40 | 功能描述:IC ADC 12BIT DUAL 40MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9238BCPZ-40EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter |
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