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| 型號(hào)： | AD9257BCPZ-65 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 25/40頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT SRL 65MSPS 64LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 65M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 功率耗散（最大）： | 547mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 8 個(gè)差分 |
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Data Sheet
AD9257
Rev. A | Page 31 of 40
MEMORY MAP REGISTER TABLE
The AD9257 uses a 3-wire interface and 16-bit addressing and,
therefore, Bit 0 and Bit 7 in Register 0x00 are set to 0, and Bit 3
and Bit 4 are set to 1. When Register 0x00, Bit 5 is set high, the
SPI enters a soft reset, where all of the user registers revert to
their default values and Bit 2 is automatically cleared.
Table 17. Memory Map Register Table
Reg.
Addr.
(Hex)
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value
(Hex)
Comments
Chip Configuration Registers
0x00
SPI port
configuration
0 = SDO
active
LSB first
Soft reset
1 =
16-bit
address
1 = 16-bit
address
Soft reset
LSB first
0 = SDO
active
0x18
The nibbles
are mirrored
so that LSB
or MSB first
mode registers
correctly. The
default for the
ADCs is 16-bit
mode.
0x01
Chip ID (global)
8-bit chip ID, Bits[7:0]
AD9257 0x92 = octal 14-bit, 40 MSPS/65 MSPS serial LVDS
Read
only
0x92
Unique chip ID
that is used to
differentiate
devices; read
only.
0x02
Chip grade
(global)
Open
Speed grade ID, Bits[6:4]
001 = 40 MSPS
011 = 65 MSPS
Open
Read
only
Unique
speed grade
ID used to
differentiate
graded
devices.
Read only.
Device Index and Transfer Registers
0x04
Device Index 2
Open
Data
Channel H
Data
Channel G
Data
Channel F
Data
Channel E
0xF
Bits are set
to determine
which device
on chip
receives the
next write
command.
The default
is all devices
on chip.
0x05
Device Index 1
Open
Clock
Channel
DCO
Clock
Channe
l FCO
Data
Channel D
Data
Channel C
Data
Channel B
Data
Channel A
0x3F
Bits are set
to determine
which device
on chip
receives the
next write
command.
The default
is all devices
on chip.
0xFF
Transfer
Open
Initiate
override
0x00
Set resolution/
sample rate
override.
Global ADC Functions
0x08
Power modes
(global)
Open
External
power-
down pin
function
0 = full
power-
down
1 =
standby
Open
Internal power-down
mode
00 = chip run
01 = full power-down
10 = standby
11 = reset
0x00
Determines
various
generic modes
of chip
operation.
0x09
Clock (global)
Open
Duty cycle
stabilize
0 = off
1 = on
0x01
Turns duty
cycle stabilizer
on or off.
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