參數(shù)資料
型號(hào): AD9257BCPZ-65
廠商: Analog Devices Inc
文件頁(yè)數(shù): 40/40頁(yè)
文件大?。?/td> 0K
描述: IC ADC 14BIT SRL 65MSPS 64LFCSP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 8
功率耗散(最大): 547mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
輸入數(shù)目和類型: 8 個(gè)差分
Data Sheet
AD9257
Rev. A | Page 9 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
D–
G
D+
G
D–
F
D+
F
D–
E
D+
E
DCO
DC
O
+
FC
O–
FC
O+
D–
D
D+
D
D–
C
D+
C
D–
B
D+
B
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
VI
N
+
F
VI
N
F
AV
D
VI
N
E
VI
N
+
E
AV
D
SYN
C
VC
M
VR
EF
SEN
SE
RBI
AS
VI
N
+
D
VI
N
D
AV
D
VI
N
C
VI
N
+
C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AVDD
VIN+ G
VIN– G
AVDD
VIN– H
VIN+ H
AVDD
CLK–
CLK+
AVDD
DNC
DRVDD
D– H
D+ H
AVDD
VIN+ B
VIN– B
AVDD
VIN– A
VIN+ A
AVDD
PDWN
CSB
SDIO/DFS
SCLK/DTP
AVDD
DNC
DRVDD
D+ A
D– A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AD9257
TOP VIEW
(Not to Scale)
102
06-
0
05
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD MUST BE CONNECTED TO ANALOG GROUND.
PIN 1
INDICATOR
Figure 5. Pin Configuration, Top View
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Description
0, EP
AGND, Exposed Pad
Analog Ground, Exposed Pad. The exposed thermal pad on the bottom of the package
provides the analog ground for the part. This exposed pad must be connected to ground
for proper operation.
1, 4, 7, 8, 11, 12, 37,
42, 45, 48, 51, 59, 62
AVDD
1.8 V Analog Supply.
13, 36
DNC
Do Not Connect.
14, 35
DRVDD
1.8 V Digital Output Driver Supply.
2, 3
VIN+ G, VIN G
ADC G Analog Input True, ADC G Analog Input Complement.
5, 6
VIN H, VIN+ H
ADC H Analog Input Complement, ADC H Analog Input True.
9, 10
CLK, CLK+
Input Clock Complement, Input Clock True.
15, 16
D H, D+ H
ADC H Digital Output Complement, ADC H Digital Output True.
17, 18
D G, D+ G
ADC G Digital Output Complement, ADC G Digital Output True.
19, 20
D F, D+ F
ADC F Digital Output Complement, ADC F Digital Output True.
21, 22
D E, D+ E
ADC E Digital Output Complement, ADC E Digital Output True.
23, 24
DCO, DCO+
Data Clock Digital Output Complement, Data Clock Digital Output True.
25, 26
FCO, FCO+
Frame Clock Digital Output Complement, Frame Clock Digital Output True.
27, 28
D D, D+ D
ADC D Digital Output Complement, ADC D Digital Output True.
29, 30
D C, D+ C
ADC C Digital Output Complement, ADC C Digital Output True.
31, 32
D B, D + B
ADC B Digital Output Complement, ADC B Digital Output True.
33, 34
D A, D+ A
ADC A Digital Output Complement, ADC A Digital Output True.
38
SCLK/DTP
Serial Clock (SCLK)/Digital Test Pattern (DTP).
39
SDIO/DFS
Serial Data Input/Output (SDIO)/Data Format Select (DFS).
40
CSB
Chip Select Bar.
41
PDWN
Power-Down.
43, 44
VIN+ A, VIN A
ADC A Analog Input True, ADC A Analog Input Complement.
46, 47
VIN B, VIN+ B
ADC B Analog Input Complement, ADC B Analog Input True.
49, 50
VIN+ C, VIN C
ADC C Analog Input True, ADC C Analog Input Complement.
52, 53
VIN D, VIN+ D
ADC D Analog Input Complement, ADC D Analog Input True.
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