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參數(shù)資料
| 型號： | AD9432BSVZ-80 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 80MSPS 52TQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 52-TQFP-EP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個差分，單極 |
AD9432
Rev. F | Page 7 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
52
V
CC
51
GN
D
50
AI
N
49
AI
N
48
GN
D
47
V
CC
46
VR
EF
O
U
T
45
VR
EF
IN
44
V
CC
43
GN
D
42
V
CC
41
DNC
40
GN
D
38
GND
37
VCC
36
VCC
33
GND
34
GND
35
GND
39
GND
32
VDD
31
DGND
30
D0 (LSB)
28
D2
27
D3
29
D1
2
VCC
3
GND
4
GND
7
ENCODE
6
VCC
5
VCC
1
GND
8
ENCODE
9
GND
10
VCC
12
DGND
13
VDD
11
GND
NOTES
1. DNC = DO NOT CONNECT.
14
OR
15
D1
1
(M
SB
)
16
D1
0
17
D9
18
D8
19
D7
20
D6
21
DG
ND
22
V
DD
23
V
DD
24
DG
ND
25
D5
26
D4
PIN 1
AD9432
TOP VIEW
(Not to Scale)
00
58
7-
0
02
00
58
7-
0
44
PIN 1
AD9432
TOP VIEW
(Not to Scale)
1
GND
2
VCC
3
GND
4
GND
5
VCC
6
VCC
7
ENCODE
8
ENCODE
9
GND
10
VCC
11
GND
12
DGND
13
VDD
14
OR
15
D1
1
(
M
S
B
)
16
D1
0
17
D9
18
D8
19
D7
20
D6
21
DG
ND
22
V
DD
23
V
DD
24
DG
ND
25
D5
26
D4
40
GN
D
41
DNC
42
V
CC
43
GN
D
44
V
CC
45
VR
E
F
IN
46
VR
E
F
O
U
T
47
V
CC
48
GN
D
49
AI
N
50
AI
N
51
GN
D
52
V
CC
27
D3
28
D2
29
D1
30
D0 (LSB)
31
DGND
32
VDD
33
GND
34
GND
35
GND
36
VCC
37
VCC
38
GND
39
GND
NOTES
1. ALTHOUGH NOT REQUIRED IN ALL APPLICATIONS, THE EXPOSED PADDLE
ON THE UNDERSIDE OF THE PACKAGE SHOULD BE SOLDERED TO THE
GROUND PLANE. SOLDERING THE EXPOSED PADDLE TO THE PCB
INCREASES THE RELIABILITY OF THE SOLDER JOINTS, MAXIMIZING
THE THERMAL CAPABILITY OF THE PACKAGE.
Figure 3. Pin Configuration, LQFP
Figure 4. Pin Configuration, TQFP_EP
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 3, 4, 9, 11, 33,
34, 35, 38, 39, 40,
43, 48, 51
GND
Analog Ground.
2, 5, 6, 10, 36, 37,
42, 44, 47, 52
VCC
Analog Supply (5 V).
7
ENCODE
Encode Clock for ADC, Complementary.
8
ENCODE
Encode Clock for ADC, True. ADC samples on rising edge of ENCODE.
12, 21, 24, 31
DGND
Digital Output Ground.
13, 22, 23, 32
VDD
Digital Output Power Supply (2.7 V to 3.6 V).
14
OR
Out-of-Range Output.
15 to 20, 25 to 30
D11 to D6, D5 to D0
Digital Output.
41
DNC
Do Not Connect.
45
VREFIN
Reference Input for ADC (2.5 V Typical). Bypass with 0.1 μF capacitor to ground.
46
VREFOUT
Internal Reference Output (2.5 V Typical).
49
AIN
Analog Input, True.
50
AIN
Analog Input, Complementary.
Exposed Pad
(TQFP_EP)
Although not required in all applications, the exposed paddle on the underside of the TQFP_EP
package should be soldered to the ground plane. Soldering the exposed paddle to the PCB
increases the reliability of the solder joints, maximizing the thermal capability of the package.
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