Generally, the AD9553 is for applications in which fREFA " />
參數(shù)資料
型號(hào)： AD9553BCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 20/44頁(yè)
文件大?。?/td> 0K
描述： IC INTEGER-N CLCK GEN 32LFCSP
標(biāo)準(zhǔn)包裝： 1
類型： 時(shí)鐘/頻率轉(zhuǎn)換器
PLL： 是
主要目的： 以太網(wǎng)，GPON，SONET/SHD，T1/E1
輸入： CMOS，LVDS，晶體
輸出： CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 1:2
差分 - 輸入:輸出： 是/是
頻率 - 最大： 810MHz
電源電壓： 3.135 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-WFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP（5x5）
包裝： 托盤(pán)
配用： AD9553/PCBZ-ND - BOARD EVAL FOR AD9553
AD9553
Rev. A | Page 27 of 44
Generally, the AD9553 is for applications in which fREFA and fREFB
are the same frequency, so the multiplexers in the REFA and
REFB paths share identical configurations. This, in conjunction
with the crystal frequency (fXTAL), results in the following rela-
tionship between the RA and RXO dividers (here K is the scale
factor for the REFA path).
A
XO
REFA
XTAL
R
K
f
×
=
×
2
(1)
Note that for pin programmed holdover applications using the
crystal, the crystal frequency must be 25 MHz. Under these
circumstances, Equation 1 simplifies as follows:
A
XO
REFA
R
K
f
×
=
× 6
10
50
CALCULATING DIVIDER VALUES
This section describes the process of calculating the divider
values when given a specific fOUT1/fREF ratio (fREF is the frequency
of either the REFA or REFB input signal source or the external
crystal resonator). This description is in general terms, but it
includes a specific example for clarity. The example assumes a
frequency control pin setting of A3 to A0 = 1011 (see Table 14)
and Y5 to Y0 = 011100 (see Table 15), yielding the following:
fREF = 125 MHz
fOUT1 = 155.52 MHz
Follow these steps to calculate the divider values.
1. Determine the output divide factor (ODF).
Note that the VCO frequency (fVCO) spans 3350 MHz to
4050 MHz. The ratio, fVCO/fOUT1, indicates the required
ODF. Given the specified value of fOUT1 (155.52 MHz)
and the range of fVCO, the ODF spans a range of 21.54 to
26.04. The ODF must be an integer, which means that ODF
is 22, 23, 24, 25, or 26.
2. Determine suitable values for P0, P1 and fVCO.
The ODF is the product of the two output dividers P0 and
P1 (ODF = P0P1). However, P0 must be between 5 and 11
which means that there are only three possibilities for ODF
in this example: ODF = 22 (P0 = 11, P1 = 2), ODF = 24 (P0
= 6, P1 = 4), and ODF = 25 (P0 = 5, P1 = 5). These three
ODF values result in the only VCO frequencies that satisfy
the 155.52 MHz requirement for OUT1 (3421.44 MHz for
ODF = 22, 3732.48 MHz for ODF = 24, and 3888 MHz for
ODF = 25). The results appear in Equation 2, Equation 3,
and Equation 4. Note that the second result (Equation 3)
agrees with Table 15 in the Preset Frequencies section).
P0 = 11, P1 = 2 (fVCO = 3421.44 MHz)
(2)
P0 = 6, P1 = 4 (fVCO = 3732.48 MHz)
(3)
P0 = 5, P1 = 5 (fVCO = 3888 MHz)
(4)
3. Determine the boundary conditions on N, K, and R.
Because of the architecture of the PLL, FPFD must be an
integer submultiple of the VCO frequency as shown in the
following equation. Note that N is an integer and is the
20-bit value of the N-divider.
N
f
FPFD
VCO
=
This relationship leads to boundary conditions on N
because N must be an integer that satisfies N = fVCO/FPFD.
The limits on FPFD (13.3 kHz to 100 MHz) combined with
the results for fVCO from Step 2 yield
N = 35...257,251 (for fVCO = 3421.44 MHz)
N = 38...280,637 (for fVCO = 3732.48 MHz)
N = 39...292,330 (for fVCO = 3888 MHz)
Note that FPFD also relates to the input frequency, fREF, per
the following equation. Here, R is the 14-bit integer divi-
sion factor of the input divider (RA or RB), while K is the
scale factor associated with the optional ×2 multiplier and
divide-by-five functions. Note that K can only be one of
four values: 1/5, 2/5, 1, or 2.
=
R
K
f
FPFD
REF
This relationship leads to boundary conditions on R because
R/K = fREF/FPFD where R must be an integer and K can only
be 1/5, 2/5, 1, or 2.
The limits on FPFD (13.3 kHz to 100 MHz) combined with
the given value of fREF yield the following bounds on R. Note
that for K = 2, the upper bound on R is limited by its 14-bit
range.
R = 1...1879 (for K = 1/5)
R = 1...3759 (for K = 2/5)
R = 2...9398 (for K = 1)
R = 3...16,384 (for K = 2)
4. Relate N, K, and R to the frequency requirements.
The two FPFD equations in Step 3 show that fVCO and fREF
relate as
R
NK
f
REF
VCO =
Note that fREF is a known quantity (125 MHz) and the VCO
frequencies were determined in Step 2 as 3421.44 MHz,
3732.48 MHz, and 3888 MHz. Based on these values of fREF
and fVCO
R
NK
R
NK
R
NK
=
125
3888
or
,
125
48
.
3732
,
125
44
.
3421
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