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參數(shù)資料
| 型號： | AD9634BCPZRL7-170 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT SRL 170MSPS 32LFCSP |
| 標準包裝： | 1,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 170M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 340mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-WQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 單端，1 個差分 |
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AD9634
Rev. 0 | Page 26 of 32
MEMORY MAP
READING THE MEMORY MAP REGISTER TABLE
Each row in the memory map register table has eight bit
locations. The memory map is roughly divided into three
sections: the chip configuration registers (Address 0x00 to
Address 0x02), the transfer register (Address 0xFF), and the
ADC functions registers (Address 0x08 to Address 0x25),
including setup, control, and test.
The memory map register table (Table 13) documents the
default hexadecimal value for each hexadecimal address shown.
The Bit 7 (MSB) column is the start of the default hexadecimal
value given. For example, Address 0x14, the output mode register,
has a hexadecimal default value of 0x01. This means that Bit 0 = 1
and the remaining bits are 0s. This setting is the default output
format value, which is twos complement. For more information
on this function and others, see the AN-877 Application Note,
Interfacing to High Speed ADCs via SPI. This document details
the functions controlled by Register 0x00 to Register 0x25.
Open Locations
All address and bit locations that are not included in Table 13
are not currently supported for this device. Write 0s to unused
bits of a valid address location. Writing to these locations is
required only when part of an address location is open (for
example, Address 0x18). If the entire address location is open
(for example, Address 0x13), do not write to this address location.
Default Values
After the AD9634 is reset, critical registers are loaded with
default values. The default values for the registers are given in
the memory map register table (see Table 13).
Logic Levels
An explanation of logic level terminology follows:
“Bit is set” is synonymous with “bit is set to Logic 1” or
“writing Logic 1 for the bit.”
“Clear a bit” is synonymous with “bit is set to Logic 0” or
“writing Logic 0 for the bit.”
Transfer Register Map
Address 0x08 to Address 0x20 are shadowed. Writes to these
addresses do not affect part operation until a transfer command is
issued by writing 0x01 to Address 0xFF, setting the transfer bit. This
allows these registers to be updated internally and simultaneously
when the transfer bit is set. The internal update takes place
when the transfer bit is set, and then the bit autoclears.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9634BCPZRL7-210 | 功能描述:模數(shù)轉換器 - ADC 12 Bit 210 Msps ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結構: 轉換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風格: 封裝 / 箱體: |
| AD9634BCPZRL7-250 | 功能描述:模數(shù)轉換器 - ADC 12 Bit 250 Msps ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結構: 轉換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風格: 封裝 / 箱體: |
| AD9635-125EBZ | 功能描述:BOARD EVAL FOR AD9635-125 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉換器 (ADC) 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| AD9635BCPZ-125 | 功能描述:IC ADC 12BIT SRL 125MSPS 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9635BCPZ-80 | 功能描述:IC ADC 12BIT SRL 80MSPS 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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