參數(shù)資料
型號： AD9707-DPG2-EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 4/44頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD9707
標(biāo)準(zhǔn)包裝： 1
系列： *
AD9704/AD9705/AD9706/AD9707
Data Sheet
Rev. B | Page 12 of 44
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
AD9707
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
8
7
6
5
4
3
2
1
DB1
DB2
DB3
DB4
DB5
DVDD
DB6
DB7
17
18
19
20
21
22
23
24
PIN/SPI/RESET
AVDD
OTCM
IOUTB
IOUTA
ACOM
REFIO
FS ADJ
16
15
14
13
12
11
10
9
M
O
DE
/S
DI
O
C
M
O
D
E/
SC
L
K
CL
KV
DD
CL
KCO
M
CL
K–
CL
K+
DCO
M
DB0
(
L
S
B)
25
26
27
28
29
30
31
32
SL
EEP/
C
SB
DCO
M
DB1
3(
M
S
B
)
DB1
2
DB1
1
DB1
0
DB9
DB8
0
59
26-
0
03
NOTES
1. IT IS RECOMMENDED THAT THE EXPOSED PAD BE
THERMALLY CONNECTED TO A COPPER GROUND
PLANE FOR ENHANCED ELECTRICAL AND THERMAL
PERFORMANCE.
Figure 3. AD9707 Pin Configuration
Table 9. AD9707 Pin Function Descriptions
Pin No.
Mnemonic
Description
28 to 32, 1,
2, 4 to 8
DB12 to DB1
Data Bit 12 to Data Bit 1.
3
DVDD
Digital Supply Voltage (1.7 V to 3.6 V).
9
DB0 (LSB)
Least Significant Data Bit (LSB).
10, 26
DCOM
Digital Common.
11
CLKVDD
Clock Supply Voltage (1.7 V to 3.6 V).
12
CLK+
Positive Differential Clock Input.
13
CLK
Negative Differential Clock Input.
14
CLKCOM
Clock Common.
15
CMODE/SCLK
In pin mode, this pin selects the clock input type. Connect to CLKCOM for single-ended clock receiver
(drive CLK+ and float CLK–). Connect to CLKVDD for differential receiver. In SPI mode, this pin is the serial
data clock input.
16
MODE/SDIO
In pin mode, this pin selects the input data format. Connect to DCOM for straight binary, and DVDD for twos
complement. In SPI mode, this pin acts as SPI data input/output.
17
PIN/SPI/RESET
Selects SPI Mode or Pin Mode Operation. Active high for pin mode operation and active low for SPI mode
operation. Pulse high to reset SPI registers to default values.
18
AVDD
Analog Supply Voltage (1.7 V to 3.6 V).
19
OTCM
Adjustable Output Common Mode. Refer to the Theory of Operation section for details.
20
IOUTB
Complementary DAC Current Output. Full-scale current is sourced when all data bits are 0s.
21
IOUTA
DAC Current Output. Full-scale current is sourced when all data bits are 1s.
22
ACOM
Analog Common.
23
REFIO
Reference Input/Output. Serves as reference input when internal reference disabled. Serves as 1.0 V
reference output when internal reference is activated. Requires a 0.1 μF capacitor to ACOM when internal
reference is activated.
24
FS ADJ
Full-Scale Current Output Adjust.
25
SLEEP/CSB
In pin mode, active high powers down chip. In SPI mode, this pin is the serial port chip select (active low).
27
DB13 (MSB)
Most Significant Data Bit (MSB).
EPAD
It is recommended that the exposed pad be thermally connected to a copper ground plane for enhanced
electrical and thermal performance.
相關(guān)PDF資料
PDF描述
AD9704-DPG2-EBZ BOARD EVAL FOR AD9704
AD9741-DPG2-EBZ IC DAC DUAL 8BIT 200MSPS 72LFCSP
0210490186 CABLE JUMPER 1.25MM .254M 12POS
AD9743-DPG2-EBZ IC DAC DUAL 10BIT 72LFCSP
AD9116-DPG2-EBZ IC DAC DUAL 12BIT LO PWR 40LFCSP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9707-EB 制造商:AD 制造商全稱:Analog Devices 功能描述:8-/10-/12-/14-Bit, 175 MSPS TxDAC D/A Converters
AD9707-EBZ 制造商:Analog Devices 功能描述:Evaluation Board For AD9707 DigitalToAnalog Converters 8/10/12/14Bit, 175 MSPS TxDAC
AD9708 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 100 MSPS TxDAC D/A Converter
AD9708AR 功能描述:IC DAC 8BIT 100MSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:*
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*