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參數(shù)資料
| 型號： | AD9726-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD9726 |
| 產(chǎn)品培訓模塊： | DAC Architectures |
| 設計資源： | AD9726 Eval Brd Schematic AD9726 Eval Brd BOM |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 400M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9726 |
| 相關(guān)產(chǎn)品： | AD9726BSVZ-ND - IC DAC 16IT LVDS 400MSPS 80-TQFP AD9726BSVZRL-ND - IC DAC 16IT LVDS 400MSPS 80-TQFP |
16-Bit, 400 MSPS
Digital-to-Analog Converter
AD9726
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2005-2010 Analog Devices, Inc. All rights reserved.
FEATURES
Dynamic performance
SFDR ≥ 78 dBc at fOUT = 20 MHz
IMD ≥ 82 dBc at fOUT = 70 MHz
ACLR ≥ 76 dBc at fOUT = 70 MHz
NSD ≤ 160 dB/Hz at fOUT = 70 MHz
Precision calibrated linearity
DNL ≤ ±0.5 LSB at +25°C
INL ≤ ±1.0 LSB at +25°C
THD ≤ 95 dB at fOUT = 1 MHz
LVDS inputs with internal 100 Ω terminations
Automatic data/clock timing synchronization
Single data rate or double data rate capable
Differential current outputs
Internal precision reference
Operates on 2.5 V and 3.3 V supplies
Extended industrial temperature range
Thermally enhanced, 80-lead, RoHS-compliant
TQFP_EP package
APPLICATIONS
Instrumentation
Test equipment
Waveform synthesis
Communications systems
FUNCTIONAL BLOCK DIAGRAM
INTERNAL
REFERENCE
CALIBRATION
MEMORY
LVDS OUTPUT
DRIVER
DAT
A
S
Y
NCHRO
NI
Z
AT
IO
N
L
V
DS
I
NP
UT
DAT
A
CAP
T
URE
SPI
CSB
SDIO
SDO
RESET
IOUTA
IOUTB
REFIO
FSADJ
SCLK
CLK+
CLK–
DCLK_OUT+
DCLK_OUT–
DB[15]+
DB[15]–
DB[0]+
DB[0]–
DCLK_IN+
DCLK_IN–
CLOCK DISTRIBUTION
AND CONTROL
16-BIT
DAC
04
54
0-
0
01
Figure 1.
.
GENERAL DESCRIPTION
The AD9726 is a 16-bit digital-to-analog converter (DAC)
that offers leading edge performance at conversion rates of up
to 400 MSPS. The device uses low voltage differential signaling
(LVDS) inputs and includes internal 100 Ω terminations. The
analog output can be single-ended or differential current. An
internal precision reference is included.
The AD9726 also features synchronization logic to monitor and
optimize the timing between incoming data and the sample clock.
This reduces system complexity and simplifies timing require-
ments. An LVDS clock output is also available to drive an external
data pump in either single data rate (SDR) or double data rate
(DDR) mode.
All device operation is fully programmable using the flexible
serial port interface (SPI). The AD9726 is also fully functional
in its default state for applications without a controller.
PRODUCT HIGHLIGHTS
1.
A unique combination of precision and performance
makes the AD9726 equally suited to applications with
demanding frequency domain or demanding time domain
requirements.
2.
Nonvolatile factory calibration assures a highly linear
transfer function. Internal logic offers on demand self-
calibration for linearity even at extended operating
temperatures.
3.
Proprietary architecture minimizes data dependent,
discrete mixing spurs and offers enhanced dynamic
performance over a wide range of output frequencies.
High input data rates create a very high frequency
synthesis bandwidth.
4.
The fully automatic, transparent synchronizer maintains
optimized timing between clock and data in real time and
offers programmable control options for added flexibility.
5.
Full-scale output current is external resistor programmable.
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