Maximum Output Update Rate (f
參數(shù)資料
型號(hào): AD9755-EB
廠商: Analog Devices Inc
文件頁數(shù): 22/28頁
文件大小: 0K
描述: BOARD EVAL FOR AD9755
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標(biāo)準(zhǔn)包裝: 1
系列: TxDAC+®
DAC 的數(shù)量: 1
位數(shù): 14
采樣率(每秒): 300M
數(shù)據(jù)接口: 并聯(lián)
設(shè)置時(shí)間: 11ns
DAC 型: 電流
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: AD9755
相關(guān)產(chǎn)品: AD9755ASTZRL-ND - IC DAC 14BIT 300MSPS 48-LQFP
AD9755ASTZ-ND - IC DAC 14BIT 300MSPS 48-LQFP
REV. B
–3–
AD9755
DYNAMIC SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Maximum Output Update Rate (fDAC)
300
MSPS
Output Settling Time (tST) (to 0.1%)
1
11
ns
Output Propagation Delay (tPD)
1
1ns
Glitch Impulse
1
5
pV-s
Output Rise Time (10% to 90%)
1
2.5
ns
Output Fall Time (90% to 10%)
1
2.5
ns
Output Noise (IOUTFS = 20 mA)
50
pA/
√Hz
Output Noise (IOUTFS = 2 mA)
30
pA/
√Hz
AC LINEARITY
Spurious-Free Dynamic Range to Nyquist
fDAC = 100 MSPS; fOUT = 1.00 MHz
0 dBFS Output
74
84
dBc
–6 dBFS Output
77
dBc
–12 dBFS Output
79
dBc
fDATA = 65 MSPS; fOUT = 1.1 MHz
2
79
dBc
fDATA = 65 MSPS; fOUT = 5.1 MHz
2
79
dBc
fDATA = 65 MSPS; fOUT = 10.1 MHz
2
78
dBc
fDATA = 65 MSPS; fOUT = 20.1 MHz
2
74
dBc
fDATA = 65 MSPS; fOUT = 30.1 MHz
2
70
dBc
fDAC = 160 MSPS; fOUT = 1.1 MHz
80
dBc
fDAC = 160 MSPS; fOUT = 11.1 MHz
77
dBc
fDAC = 160 MSPS; fOUT = 31.1 MHz
72
dBc
fDAC = 160 MSPS; fOUT = 51.1 MHz
72
dBc
fDAC = 160 MSPS; fOUT = 71.1 MHz
69
dBc
fDAC = 300 MSPS; fOUT = 1.1 MHz
80
dBc
fDAC = 300 MSPS; fOUT = 26.1 MHz
71
dBc
fDAC = 300 MSPS; fOUT = 51.1 MHz
67
dBc
fDAC = 300 MSPS; fOUT = 101.1 MHz
61
dBc
fDAC = 300 MSPS; fOUT = 141.1 MHz
60
dBc
Spurious-Free Dynamic Range within a Window
fDAC = 100 MSPS; fOUT = 1 MHz; 2 MHz Span
0 dBFS Output
83.5
93
dBc
fDAC = 65 MSPS; fOUT = 5.02 MHz; 2 MHz Span
85
dBc
fDAC = 150 MSPS; fOUT = 5.04 MHz; 4 MHz Span
85
dBc
Total Harmonic Distortion
fDAC = 100 MSPS; fOUT = 1.00 MHz
TA = 25
°C
–83
–73
dBc
TMIN to TMAX
–83
–71
dBc
fDAC = 65 MHz; fOUT = 2.00 MHz
–78
dBc
fDAC = 160 MHz; fOUT = 2.00 MHz
–78
dBc
Multitone Power Ratio (Eight Tones at 110 kHz Spacing)
fDAC = 65 MSPS; fOUT = 2.00 MHz to 2.77 MHz
0 dBFS Output
75
dBc
–6 dBFS Output
73
dBc
–12 dBFS Output
70
dBc
NOTES
1Measured single-ended into 50
load.
2Single Port Mode (PLL disabled, DIV0 = 1, DIV1 = 0, data on Port 1).
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, PLLVDD = 0 V, CLKVDD = 3.3 V, IOUTFS = 20 mA,
Differential Transformer-Coupled Output, 50
Doubly Terminated, unless otherwise noted.)
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