- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8621 > AD9762ARZ (Analog Devices Inc)IC DAC 12BIT 125MSPS 28-SOIC PDF資料下載
參數(shù)資料
| 型號： | AD9762ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT 125MSPS 28-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | TxDAC® |
| 設(shè)置時間： | 35ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 160mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 125M |
| 產(chǎn)品目錄頁面： | 785 (CN2011-ZH PDF) |
AD9762
–17–
REV. B
For those applications that require a single +5 V or +3 V supply
for both the analog and digital supply, a clean analog supply
may be generated using the circuit shown in Figure 55. The
circuit consists of a differential LC filter with separate power
supply and return lines. Lower noise can be attained using low
ESR type electrolytic and tantalum capacitors.
100 F
ELECT.
10-22 F
TANT.
0.1 F
CER.
TTL/CMOS
LOGIC
CIRCUITS
+5V OR +3V
POWER SUPPLY
FERRITE
BEADS
AVDD
ACOM
Figure 55. Differential LC Filter for Single +5 V or +3 V
Applications
Maintaining low noise on power supplies and ground is critical
to obtaining optimum results from the AD9762. If properly
implemented, ground planes can perform a host of functions on
high speed circuit boards: bypassing, shielding, current trans-
port, etc. In mixed signal design, the analog and digital portions
of the board should be distinct from each other, with the analog
ground plane confined to the areas covering the analog signal
traces, and the digital ground plane confined to areas covering
the digital interconnects.
All analog ground pins of the DAC, reference and other analog
components should be tied directly to the analog ground plane.
The two ground planes should be connected by a path 1/8 to
1/4 inch wide underneath or within 1/2 inch of the DAC to
maintain optimum performance. Care should be taken to ensure
that the ground plane is uninterrupted over crucial signal paths.
On the digital side, this includes the digital input lines running
to the DAC as well as any clock signals. On the analog side, this
includes the DAC output signal, reference signal and the supply
feeders.
The use of wide runs or planes in the routing of power lines is
also recommended. This serves the dual role of providing a low
series impedance power supply to the part, as well as providing
some “free” capacitive decoupling to the appropriate ground
plane. It is essential that care be taken in the layout of signal
and power ground interconnects to avoid inducing extraneous
voltage drops in the signal ground paths. It is recommended that
all connections be short, direct and as physically close to the
package as possible in order to minimize the sharing of conduc-
tion paths between different currents. When runs exceed an inch
in length, strip line techniques with proper termination resistor
should be considered. The necessity and value of this resistor
will be dependent upon the logic family used.
For a more detailed discussion of the implementation and
construction of high speed, mixed signal printed circuit boards,
refer to Analog Devices’ application notes AN-280 and AN-333.
APPLICATIONS
Using the AD9762 for QAM Modulation
QAM is one of the most widely used digital modulation schemes
in digital communication systems. This modulation technique
can be found in both FDM as well as spreadspectrum (i.e.,
CDMA) based systems. A QAM signal is a carrier frequency
which is both modulated in amplitude (i.e., AM modulation)
and in phase (i.e., PM modulation). It can be generated by
independently modulating two carriers of identical frequency
but with a 90
° phase difference. This results in an in-phase (I)
carrier component and a quadrature (Q) carrier component at a
90
° phase shift with respect to the I component. The I and Q
components are then summed to provide a QAM signal at the
specified carrier frequency.
A common and traditional implementation of a QAM modu-
lator is shown in Figure 56. The modulation is performed in the
analog domain in which two DACs are used to generate the
baseband I and Q components, respectively. Each component is
then typically applied to a Nyquist filter before being applied to
a quadrature mixer. The matching Nyquist filters shape and
limit each component’s spectral envelope while minimizing
intersymbol interference. The DAC is typically updated at the
QAM symbol rate or possibly a multiple of it if an interpolating
filter precedes the DAC. The use of an interpolating filter typi-
cally eases the implementation and complexity of the analog
filter, which can be a significant contributor to mismatches in
gain and phase between the two baseband channels. A quadra-
ture mixer modulates the I and Q components with in-phase
and quadrature phase carrier frequency and then sums the two
outputs to provide the QAM signal.
AD9762
0
90
Σ
AD9762
CARRIER
FREQUENCY
12
TO
MIXER
DSP
OR
ASIC
NYQUIST
FILTERS
QUADRATURE
MODULATOR
Figure 56. Typical Analog QAM Architecture
In this implementation, it is much more difficult to maintain
proper gain and phase matching between the I and Q channels.
The circuit implementation shown in Figure 57 helps improve
upon the matching and temperature stability characteristics
between the I and Q channels. Using a single voltage reference
derived from U1 to set the gain for both the I and Q channels
will improve the gain matching and stability. Further enhance-
ments in gain matching and stability are achieved by using
separate matching resistor networks for both RSET and RLOAD.
Additional trim capability via RCAL1 and RCAL2 can be added to
compensate for any initial mismatch in gain between the two
channels. This may be attributed to any mismatch between U1
and U2’s gain setting resistor, (RSET); effective load resistance,
(RLOAD); and/or voltage offset of each DAC’s control amplifier.
The differential voltage outputs of U1 and U2 are fed into their
respective differential inputs of a quadrature mixer via matching
50
filter networks.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9762AR | IC DAC 12BIT 125MSPS 28-SOIC |
| AD558JP-REEL7 | IC DAC 8BIT 5-15V IN MONO 20PLCC |
| MAX3272AETP+ | IC AMP LIMITING 20-TQFN |
| SY88703VKG | IC POST AMP PECL LP LIMIT 10MSOP |
| VE-2TP-IV-F4 | CONVERTER MOD DC/DC 13.8V 150W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9762ARZRL | 功能描述:IC DAC 12BIT 125MSPS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD9762-EB | 制造商:Analog Devices 功能描述:IC SEMICONDUCTOR ((NS)) |
| AD9762-EBZ | 功能描述:BOARD EVAL FOR AD9762 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9763 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 125 MSPS Dual TxDAC+ D/A Converter |
| AD9763_11 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-/12-/14-Bit, 125 MSPS Dual TxDAC Digital-to-Analog Converters |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。