參數(shù)資料
型號(hào): AD9788-DPG2-EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 50/64頁(yè)
文件大小: 0K
描述: BOARD EVALUATION FOR AD9788
設(shè)計(jì)資源: Powering the AD9788 Using ADP2105 for Increased Efficiency (CN0141)
標(biāo)準(zhǔn)包裝: 1
系列: *
DAC 的數(shù)量: 2
位數(shù): 16
采樣率(每秒): 800M
數(shù)據(jù)接口: 串行
設(shè)置時(shí)間: 22ms
DAC 型: 電流
工作溫度: -40°C ~ 85°C
已供物品: *
已用 IC / 零件: AD9788
AD9785/AD9787/AD9788
Rev. A | Page 54 of 64
AD9785/AD9787/AD9788 EVALUATION BOARDS
The remainder of this data sheet describes the evaluation
boards for testing the AD9785, AD9787, and AD9788 devices.
OUTPUT CONFIGURATION
Each evaluation board contains an Analog Devices ADL5372
quadrature modulator. The AD9785/AD9787/AD9788 devices
and the ADL5372 provide an easy-to-interface DAC/modulator
combination that can be easily characterized on the evaluation
board.
Solderable jumpers can be configured to evaluate the single-
ended or differential outputs of the AD9785/AD9787/AD9788.
The factory default jumper configuration is as follows:
Jumpers JP2, JP3, JP4, and JP8 are unsoldered.
Jumpers JP14, JP15, JP16, and JP17 are soldered.
To evaluate the ADL5372 on the evaluation board, reverse the
jumper positions as follows:
Jumpers JP2, JP3, JP4, and JP8 are soldered.
Jumpers JP14, JP15, JP16, and JP17 are unsoldered.
Note that the ADL5372 also requires its own separate 5 V and
GND connection on the evaluation board.
DIGITAL PICTURE OF EVALUATION BOARD
07
09
8-
0
5
8
5V POWER
ADL5372
OUTPUT
ADL5372
LO INPUT
AD9788
SYNC
INPUTS
REFCLK
INPUT
DIGITAL DATA
INPUTS
S5
JP4 JP15
JP14
S8
S9
S6
RESET
DATACLK
OUTPUT
SYNC
OUTPUTS
SPI
PORT
GND
+5V
ADL5372
JP8
JP16
JP3
JP17
JP2
Figure 79. Evaluation Board
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