參數(shù)資料
型號: AD9880KSTZ-150
廠商: Analog Devices Inc
文件頁數(shù): 18/64頁
文件大?。?/td> 0K
描述: IC INTERFACE/HDMI 150MHZ 100LQFP
標(biāo)準(zhǔn)包裝: 1
應(yīng)用: 視頻
接口: 模擬,HDMI
電源電壓: 3.15 V ~ 3.47 V
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
安裝類型: 表面貼裝
產(chǎn)品目錄頁面: 775 (CN2011-ZH PDF)
配用: AD9880/PCBZ-ND - KIT EVALUATION AD9880
AD9880
Rev. 0 | Page 25 of 64
Hex
Address
Read/Write
or Read Only
Bits
Default
Value
Register Name
Description
0x17
Read
[3:0]
****0000
Hsyncs Per Vsync
MSB
MSB of Hsyncs per Vsync.
0x18
Read
[7:0]
00000000
Hsyncs Per Vsync
Hsyncs per Vsync count.
0x19
Read/Write
[7:0]
00001000
Clamp Placement
Number of pixel clocks after trailing edge of Hsync to begin
clamp.
0x1A
Read/Write
[7:0]
00010100
Clamp Duration
Number of pixel clocks to clamp.
0x1B
Read/Write
[7]
0*******
Red Clamp Select
0 = clamp to ground.
1 = clamp to midscale.
[6]
*0******
Green Clamp Select
0 = clamp to ground.
1 = clamp to midscale.
[5]
**0*****
Blue Clamp Select
0 = clamp to ground.
1 = clamp to midscale.
[4]
***0****
Clamp During Coast
Enable
0 = don’t clamp during Coast.
1 = clamp during Coast.
[3]
****0***
Clamp Disable
0 = internal clamp enabled.
1 = internal clamp disabled.
[1]
******1*
Programmable
Bandwidth
0 = low bandwidth.
1 = full bandwidth.
[0]
*******0
Hold Auto Offset
0 = normal auto offset operation.
1 = hold current offset value.
0x1C
Read/Write
[7]
0*******
Auto Offset Enable
0 = manual offset.
1 = auto offset using offset as target code.
[6:5]
*10*****
Auto Offset
00 = every clamp.
Update Mode
01 = every 16 clamps.
10 = every 64 clamps.
11 = Every Vsync.
[4:3]
***01***
Difference Shift
00 = 100% of difference used to calculate new offset.
Amount
01 = 50%.
10 = 25%.
11 = 12.5%.
[2]
*****1**
Auto Jump Enable
0 = normal operation.
1 = if code > 15 codes off then offset is jumped to the predicted
offset necessary to fix the > 15 code mismatch.
[1]
******1*
Post Filter Enable
0 = disable post filer.
1 = enable post filter.
Post filter reduces update rate by 1/6 and requires that all six
updates recommend a change before changing the offset. This
prevents unwanted offset changes.
[0]
*******0
Toggle Filter Enable
The toggle filter looks for the offset to toggle back and forth and
holds it if triggered. This is to prevent toggling in case of missing
codes in the PGA.
0x1D
Read/Write
[7:0]
00001000
Slew Limit
Limits the amount the offset can change by in a single update.
0x1E
Read/Write
[7:0]
32
Sync Filter Lock
Threshold
Number of clean Hsyncs required for sync filter to lock.
0x1F
Read/Write
[7:0]
50
Sync Filter Unlock
Threshold
Number of missing Hsyncs required to unlock the sync filter. Counter
counts up if Hsync pulse is missing and down for a good Hsync.
0x20
Read/Write
[7:0]
50
Sync Filter Window
Width
Width of the window in which Hsync pulses are allowed.
0x21
Read/Write
[7]
1*******
SP Sync Filter Enable
Enables Coast, Vsync duration, and Vsync filter to use the
regenerated Hsync rather than the raw Hsync.
相關(guān)PDF資料
PDF描述
MS3126E14-5SX CONN PLUG 5POS STRAIGHT W/SCKT
MS3126E14-5S CONN PLUG 5POS STRAIGHT W/SCKT
0533980771 CONN HEADER 7POS 1.25MM VERT SMD
AD9883ABSTZ-110 IC FLAT PANEL INTERFACE 80-LQFP
V28C48H100BF CONVERTER MOD DC/DC 48V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9880XSTZ-100 制造商:Analog Devices 功能描述:IC, ANALOG/HDMI DUAL DISPLAY INTERFACE, PQFP100
AD9882 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays
AD9882/PCB 制造商:Analog Devices 功能描述:DUAL INTRFC FOR FLAT PNL DISPLAY 100LQFP - Bulk
AD9882A 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays
AD9882A/PCB 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays