參數(shù)資料
型號(hào)： ADAU1381BCPZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 39/84頁(yè)
文件大小： 0K
描述： IC AUDIO CODEC STEREO LN 32LFCSP
標(biāo)準(zhǔn)包裝： 5,000
類型： 立體聲音頻
數(shù)據(jù)接口： 串行，SPI?
分辨率（位）： 24 b
ADC / DAC 數(shù)量： 2 / 2
三角積分調(diào)變： 無(wú)
S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： 97 / 100
動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： 96.5 / 100
電壓 - 電源，模擬： 1.8 V ~ 3.65 V
電壓 - 電源，數(shù)字： 1.63 V ~ 3.65 V
工作溫度： -25°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ
包裝： 帶卷 (TR)
配用： EVAL-ADAU1381Z-ND - BOARD EVALUATION FOR ADAU1381
ADAU1381
Rev. B | Page 44 of 84
CLOCK MANAGEMENT, INTERNAL REGULATOR,
AND PLL CONTROL
Register 16384 (0x4000), Clock Control
The clock control register sets the clocking scheme for the
ADAU1381. The system clock can be generated from either the
PLL or directly from the MCKI (master clock input) pin. Addi-
tionally, the MCKO (master clock output) pin can be configured.
Bits[6:5], MCKO Frequency
These bits set the frequency to be output on MCKO as a multiple
of the base sampling frequency (32×, 64×, 128×, or 256×). The
MCKO pin can be used to provide digital microphones with a clock.
Bit 4, MCKO Enable
This bit enables or disables the MCKO pin.
Bit 3, Clock Source Select
The clock source select bit either routes the MCLK input through
the PLL or bypasses the PLL. When using the PLL, the output of
the PLL is always 1024 × fS, and Bits[2:1] should be set to 11.
PLL parameters can be set in the PLL control register. Inputs
directly from MCKI require an exact clock rate as described in
Bits[2:1], Input Master Clock Frequency
The maximum clock speed allowed is 1024 × 48 kHz. These bits set
the expected input master clock frequency for proper clock divider
values in order to output a constant system clock of 256 × fS. When
using the PLL, these bits must always be set to 1024 × fS. When
bypassing the PLL, the external clock frequency on the MCKI pin
must be 256 × fS, 512 × fS, 768 × fS, or 1024 × fS. Table 29 and
Table 30 show the relationship between the system clock and the
internal master clock for base sampling frequencies of 44.1 kHz
and 48 kHz.
Bit 0, Core Clock Enable
This bit enables the internal master clock to start the IC.
Table 28. Clock Control Register
Bits
Description
Default
7
Reserved
[6:5]
MCKO frequency
00
00: 32 × fS
01: 64 × fS
10: 128 × fS
11: 256 × fS
4
MCKO enable
0
0: disabled
1: enabled
3
Clock source select
0
0: direct from MCKI pin
1: PLL clock
[2:1]
Input master clock frequency
00
00: 256 × fS
01: 512 × fS
10: 768 × fS
11: 1024 × fS
0
Core clock enable
0
0: core clock disabled
1: core clock enabled
Table 29. Core Clock Output for fS = 44.1 kHz
MCLK Input Setting
MCLK Input Value
MCLK Input Divider
Core Clock
256 × fS
11.2896 MHz
1
11.2896 MHz
512 × fS
22.5792 MHz
2
11.2896 MHz
768 × fS
33.8688 MHz
3
11.2896 MHz
1024 × fS
45.1584 MHz
4
11.2896 MHz
Table 30. Core Clock Output for fS = 48 kHz
MCLK Input Setting
MCLK Input Value
MCLK Input Divider
Core Clock
256 × fS
12.288 MHz
1
12.288 MHz
512 × fS
24.576 MHz
2
12.288 MHz
768 × fS
36.864 MHz
3
12.288 MHz
1024 × fS
49.152 MHz
4
12.288 MHz
相關(guān)PDF資料
PDF描述
VE-J3K-IX-S CONVERTER MOD DC/DC 40V 75W
ADAU1361BCPZ-RL IC CODEC 24B PLL 32LFCSP
VE-J3J-IX-S CONVERTER MOD DC/DC 36V 75W
PK40N512VLQ100 IC ARM CORTEX MCU 512K 144-LQFP
CS4245-DQZR IC CODEC AUD STER 104DB 48-LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADAU1381BCPZ-RL7 功能描述:IC AUDIO CODEC STEREO LN 32LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
ADAU1382BCPZ 制造商:Analog Devices 功能描述:STEREO AUDIO CODEC FOR DIG STILL CAM - Trays 制造商:Analog Devices 功能描述:IC AUDIO CODEC 24BIT 96KHZ LFCSP-32 制造商:Analog Devices 功能描述:IC, AUDIO CODEC, 24BIT, 96KHZ, LFCSP-32, Audio CODEC Type:Stereo, No. of ADCs:2, 制造商:Analog Devices 功能描述:AUDIO CODEC
ADAU1382BCPZ-R7 制造商:Analog Devices 功能描述:STEREO AUDIO CODEC FOR DIG STILL CAM - Tape and Reel 制造商:Analog Devices 功能描述:AUDIO CODEC
ADAU1401 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
ADAU1401A 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*