參數(shù)資料
型號: ADC1010S125HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Single 10-bit ADC up to 125 Msps, CMOS or LVDS DDR digital outputs
封裝: ADC1010S125HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-1.html<1<Always Pb-free,;ADC1010S125HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
文件頁數(shù): 4/39頁
文件大?。?/td> 296K
代理商: ADC1010S125HN
ADC1010S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 28 December 2010
4 of 39
NXP Semiconductors
ADC1010S series
Single 10-bit ADC; CMOS or LVDS DDR digital outputs
[1]
P: power supply; G: ground; I: input; O: output; I/O: input/output.
Table 3.
Symbol
D8_D9_M
D8_D9_P
D6_D7_M
D6_D7_P
D4_D5_M
D4_D5_P
D2_D3_M
D2_D3_P
D0_D1_M
D0_D1_P
n.c.
n.c.
n.c.
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
n.c.
n.c.
n.c.
n.c.
DAV
n.c.
VDDO
OGND
OTR
SCLK/DFS
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
O
O
O
O
O
O
O
O
O
O
-
-
-
-
O
-
P
G
O
I
data output bit 9 (Most Significant Bit (MSB))
data output bit 8
data output bit 7
data output bit 6
data output bit 5
data output bit 4
data output bit 3
data output bit 2
data output bit 1
data output bit 0 (Least Significant Bit (LSB))
not connected
not connected
not connected
not connected
data valid output clock
not connected
output power supply
output ground
out of range
SPI clock
data format select
SPI data IO
output data standard
SPI chip select
reference programming pin
voltage reference input/output
SDIO/ODS
37
I/O
CS
SENSE
VREF
38
39
40
I
I
I/O
Pin description (LVDS DDR) digital outputs)
Pin
[1]
Type
[2]
Description
17
O
differential output data D8 and D9 multiplexed, complement
18
O
differential output data D8 and D9 multiplexed, true
19
O
differential output data D6 and D7 multiplexed, complement
20
O
differential output data D6 and D7 multiplexed, true
21
O
differential output data D4 and D5 multiplexed, complement
22
O
differential output data D4 and D5 multiplexed, true
23
O
differential output data D2 and D3 multiplexed, complement
24
O
differential output data D2 and D3 multiplexed, true
25
O
differential output data D0 and D1 multiplexed, complement
26
O
differential output data D0 and D1 multiplexed, true
27
-
not connected
28
-
not connected
29
-
not connected
Table 2.
Symbol
Pin description (CMOS digital outputs)
…continued
Pin
Type
[1]
Description
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