參數(shù)資料
型號: ADC1010S125HN
廠商: NXP Semiconductors N.V.
元件分類: 外設(shè)及接口
英文描述: Single 10-bit ADC up to 125 Msps, CMOS or LVDS DDR digital outputs
封裝: ADC1010S125HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618-1.html<1<Always Pb-free,;ADC1010S125HN/C1<SOT618-1 (HVQFN40)|<<http://www.nxp.com/packages/SOT618
文件頁數(shù): 7/39頁
文件大?。?/td> 296K
代理商: ADC1010S125HN
ADC1010S_SER
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 28 December 2010
7 of 39
NXP Semiconductors
ADC1010S series
Single 10-bit ADC; CMOS or LVDS DDR digital outputs
[1]
Typical values measured at V
DDA
= 3 V, V
DDO
= 1.8 V, T
amb
= 25
°
C and C
L
= 5 pF; minimum and maximum values are across the full
temperature range T
amb
=
40
°
C to +85
°
C at V
DDA
= 3 V, V
DDO
= 1.8 V; V
INP
V
INM
=
1 dBFS; internal reference mode; applied to
CMOS and LVDS interface; unless otherwise specified.
Digital outputs, CMOS mode: pins D9 to D0, OTR, DAV
Output levels, V
DDO
= 3 V
V
OL
LOW-level output voltage
V
OH
HIGH-level output voltage
C
O
output capacitance
Output levels, V
DDO
= 1.8 V
V
OL
LOW-level output voltage
V
OH
HIGH-level output voltage
Digital outputs, LVDS mode: pins D8_D9_P to D0_D1_P, D8_D9_M to D0_D1_M, DAVP and DAVM
Output levels, V
DDO
= 3 V only, R
L
= 100
Ω
V
O(offset)
output offset voltage
output buffer current set to
3.5 mA
V
O(dif)
differential output voltage
output buffer current set to
3.5 mA
C
O
output capacitance
Analog inputs: pins INP and INM
I
I
input current
R
i(dif)
differential input resistance
C
i(dif)
differential input capacitance
V
I(cm)
common-mode input voltage
V
INP
= V
INM
B
i
input bandwidth
V
I(dif)
differential input voltage
peak-to-peak
Common mode output voltage: pin VCM
V
O(cm)
common-mode output voltage
I
O(cm)
common-mode output current
I/O reference voltage: pin VREF
V
VREF
voltage on pin VREF
output
input
Accuracy
INL
integral non-linearity
DNL
differential non-linearity
guaranteed no missing codes
E
offset
offset error
E
G
gain error
full-scale
Supply
PSRR
power supply rejection ratio
200 mV (p-p) on V
DDA
; f
i
= DC
OGND
0.8V
DDO
-
-
-
3
0.2V
DDO
V
V
DDO
-
V
pF
high impedance; OE = HIGH
OGND
0.8V
DDO
-
-
0.2V
DDO
V
V
DDO
V
-
1.2
-
V
-
350
-
mV
-
3
-
pF
5
-
-
1.1
-
1
-
19.8
2.8
1.5
650
-
+5
-
-
2.5
-
2
μ
A
k
Ω
pF
V
MHz
V
-
-
V
DDA
/ 2
4
-
-
V
mA
0.5
0.5
-
-
1
1
V
V
-
0.06
-
±
0.07
±
0.04
±
2
±
0.5
-
+0.06
-
LSB
LSB
mV
%
-
54
-
dB
Table 6.
Symbol
Static characteristics
[1]
…continued
Parameter
Conditions
Min
Typ
Max
Unit
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