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參數(shù)資料
| 型號： | ADC10662CIWM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | RES 12-OHM 5% 0.25W 200PPM THK-FILM SMD-1206 TR-7-PA |
| 中文描述： | 2-CH 10-BIT FLASH/SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| 封裝： | SO-24 |
| 文件頁數(shù)： | 3/14頁 |
| 文件大小： | 274K |
| 代理商： | ADC10662CIWM |
Pin Descriptions
DV
CC
,
AV
CC
ply voltage inputs. They should always be con-
nected to the same voltage source, but are
brought out separately to allow for separate
bypass capacitors. Each supply pin should be
bypassed with a 0.1 μF ceramic capacitor in
parallel with a 10 μF tantalum capacitor to
ground.
INT
This is the active low interrupt output. INT
goes low at the end of each conversion, and
returns to a high state following the rising edge
of RD .
S /H
This is the Sample/Hold control input. When
this pin is forced low (and CS is low), it causes
the analog input signal to be sampled and ini-
tiates a new conversion.
RD
This is the active low Read control input.
When this RD and CS are low, any data
present in the output registers will be placed
on the data bus.
CS
This is the active low Chip Select control input.
When low, this pin enables the RD and S /H
pins.
S0, S1
These pins select the analog input that will be
connected to the A/D during the conversion.
The input is selected based on the state of S0
and S1 when S /H makes its High-to-Low tran-
sition
(See
the
ADC10664 includes both S0 and S1. The
ADC10662 includes just S0.
V
REF
,
V
REF+
may be placed at any voltage between GND
and V
, but V
must be greater than
V
. An input voltage equal to V
pro-
duces an output code of 0, and an input volt-
age equal to (V
1 LSB) produces an out-
put code of 1023.
These are the digital and analog positive sup-
Timing
Diagrams).
The
These are the reference voltage inputs. They
V
IN0
, V
IN1
,
V
IN2
, V
IN3
These
ADC10662 has two inputs (V
and V
IN1
) and
the ADC10664 has four inputs (V
, V
,
V
and V
). The impedance of the source
should be less than 500
for best accuracy
and conversion speed. For accurate conver-
sions, no input pin (even one that is not se-
lected) should be driven more than 50 mV
above V
CC
or 50 mV below ground.
These are the power supply ground pins. The
ADC10662 and ADC10664 have separate
analog and digital ground pins (AGND and
DGND) for separate bypassing of the analog
and digital supplies. The ground pins should
be connected to a stable, noise-free system
ground. Both pins should be returned to the
same potential.
These are the TRI-STATE output pins.
By connecting a resistor between this pin and
ground, the conversion time can be reduced.
The specifications listed in the table of Electri-
cal Characteristics apply for a speed adjust re-
sistor (R
) equal to 14.0 k
(Mode 1) or 8.26
k
(Mode 2). See the Typical Performance
Curves and the table of Electrical Characteris-
tics.
are
the
analog
input
pins.
The
GND, AGND,
DGND
DB0–DB9
SPEED
ADJ
www.national.com
3
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參數(shù)描述 |
|---|---|
| ADC10662CIWM/NOPB | 功能描述:IC ADC 10BIT 360 NS 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC10662CIWMX | 功能描述:IC ADC 10BIT 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC10662CIWMX/NOPB | 制造商:Texas Instruments 功能描述:ADC Single Pipelined 1.5Msps 10-bit Parallel 24-Pin SOIC W T/R |
| ADC10662CMJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC10664 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:10-Bit 360 ns A/D Converter with Input Multiplexer and Sample/Hold |
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