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參數(shù)資料
| 型號： | ADC12762 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 12-Bit, 1.4 MHz, 300 mW A/D Converter with Input Multiplexer and Sample/Hold |
| 中文描述： | 12位，1.4兆赫，300毫瓦的A / D輸入多路復用器和轉(zhuǎn)換器采樣/保持 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 427K |
| 代理商： | ADC12762 |
Applications Information
(Continued)
POWER SUPPLY CONSIDERATIONS
The ADC12762 is designed to operate from a single +5V
power supply. There are two analog supply pins (AV
) and
one digital supply pin (DV
). These pins allow separate ex-
ternal bypass capacitors for the analog and digital portions of
the circuit. To guarantee proper operation of the converter,
all three supply pins should be connected to the same volt-
age source. In systems with separate analog and digital sup-
plies, the converter should be powered from the analog sup-
ply.
The ground pins are AGND (analog ground), DGND1 (digital
input ground), and DGND2 (digital output ground). These
pins allow for three separate ground planes for these sec-
tions of the chip. Isolating the analog section from the two
digital sections reduces digital interference in the analog cir-
cuitry, improving the dynamic performance of the converter.
Separating the digital outputs from the digital inputs (particu-
larly the S/H input) reduces the possibility of ground bounce
from the 12 data lines causing jitter on the S/H input. The
analog ground plane should be connected to the Digital2
ground plane at the ground return for the power supply. The
Digital1 ground plane should be tied to the Digital2 ground
plane at the DGND1 and DGND2 pins.
Both AV
pins should be bypassed to the AGND ground
plane with 0.1 μF ceramic capacitors. One of the two AV
pins should also be bypassed with a 10 μF tantalum capaci-
tor. DV
should be bypassed to the DGND2 ground pIane
with a 0.1 μF capacitor in parallel with a 10 μF tantalum ca-
pacitor.
LAYOUT AND GROUNDING
In order to ensure fast, accurate conversions from the
ADC12762, it is necessary to use appropriate circuit board
layout techniques. Separate analog and digital ground
planes are required to meet datasheetAC and DC limits. The
analog ground plane should be low-impedance and free of
noise from other parts of the system.
All bypass capacitors should be located as close to the con-
verter as possible and should connect to the converter and
to ground with short traces. The analog input should be iso-
lated from noisy signal traces to avoid having spurious sig-
nals couple to the input. Any external component (e.g., a fil-
ter capacitor) connected across the converter’s input should
be connected to a very clean analog ground return point.
Grounding the component at the wrong point will result in in-
creased noise and reduced conversion accuracy.
Figure 12 gives an example of a suitable layout, including
power supply routing, ground plane separation, and bypass
capacitor placement. All analog circuitry (input amplifiers, fil-
ters, reference components, etc.) should be placed on the
analog ground plane. All digital circuitry and I/O lines (ex-
DS012811-34
FIGURE 11. Using the V
REF
Force Pins Only
www.national.com
16
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