參數(shù)資料
型號: ADC12L032
廠商: National Semiconductor Corporation
元件分類: 串行ADC
英文描述: 3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold(可自行校對3.3V12位串行輸入/輸出帶MUX,采樣/保持功能A/D轉(zhuǎn)換器)
中文描述: 3.3自校準(zhǔn)12位帶符號串行I /辦公自動化/ D轉(zhuǎn)換器MUX和采樣/保持(可自行校對3.3V12位串行輸入/輸出帶復(fù)用,采樣/保持功能的A / D轉(zhuǎn)換器)
文件頁數(shù): 24/36頁
文件大?。?/td> 819K
代理商: ADC12L032
Tables
(Continued)
TABLE 6. Conversion/Read Data Only Mode Programming
(Continued)
CS
L
CONV
H
PD
L
Mode
Read Only (Previous DO Format)
No Conversion
Idle
Power Down
H
X
X
X
L
H
X = Don’t Care
TABLE 7. Status Register
Status
Bit
Location
Status
Bit
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
PU
PD
Cal
8 or 9
12 or 13
16 or 17
Sign
Justification
Test
Mode
Device Status
DO Output Format Status
Function
“High”
indicates
a Power
Up
Sequence
is in
progress
“High”
indicates
a Power
Down
Sequence
is in
progress
“High”
indicates
an
Auto-Cal
Sequence
is in
progress
“High”
indicates
an 8 or 9
bit format
“High”
indicates
a 12 or
13 bit
format
“High”
indicates
a 16 or
17 bit
format
“High”
indicates
that the
sign bit is
included.
When
“Low” the
sign bit is
not
included.
When “High”
the conversion
result will be
output MSB
first. When
“Low” the
result will be
output LSB
first.
When
“High”
the
device is
in test
mode.
When
“Low” the
device is
in user
mode.
Application Hints
1.0 DIGITAL INTERFACE
1.1 Interface Concepts
The example in Figure 7shows a typical sequence of events
after the power is applied to the ADC12L030/2/4/8:
The first instruction input to the A/D via DI initiates Auto Cal.
The data output on DO at that time is meaningless and is
completely random. To determine whether the Auto Cal has
been completed, a read status instruction is issued to the
A/D. Again the data output at that time has no significance
since the Auto Cal procedure modifies the data in the output
shift register. To retrieve the status information, an additional
read status instruction is issued to the A/D. At this time the
status data is available on DO. If the Cal signal in the status
word is low Auto Cal has been completed. Therefore, the
next instruction issued can start a conversion. The data
output at this time is again status information. To keep noise
from corrupting the A/D conversion, the status can not be
read during a conversion. If CS is strobed and is brought low
during a conversion, that conversion is prematurely ended.
EOC can be used to determine the end of a conversion or
theA/D controller can keep track in software of when it would
be appropriate to communicate to the A/D again. Once it has
been determined that the A/D has completed a conversion
another instruction can be transmitted to the A/D. The data
from this conversion can be accessed when the next instruc-
tion is issued to the A/D.
Note, when CS is low continuously it is important to transmit
the exact number of SCLK cycles, as shown in the timing
diagrams. Not doing so will desynchronize the serial com-
munication to the A/D (see Section 1.3).
1.2 Changing Configuration
The configuration of the ADC12L030/2/4/8 on power up
defaults to 12-bit plus sign resolution, 12- or 13-bit MSB
First, 10 CCLK acquisition time, user mode, no Auto Cal, no
Auto Zero, and power up mode. Changing the acquisition
time and turning the sign bit on and off requires an 8-bit
instruction to be issued to the ADC. This instruction will not
start a conversion. The instructions that select a multiplexer
address and format the output data do start a conversion.
Figure 8describes an example of changing the configuration
of the ADC12L030/2/4/8.
During I/O sequence 1 the instruction on DI configures the
ADC12L030/2/4/8 to do a conversion with 12-bit +sign reso-
lution. Notice that when the 6 CCLK Acquisition and Data
Out without Sign instructions are issued to the ADC, I/O
sequences 2 and 3, a new conversion is not started. The
data output during these instructions is from conversion N
which was started during I/O sequence 1. The Configuration
DS011830-36
FIGURE 7. Typical Power Supply Power Up Sequence
A
www.national.com
24
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