參數(shù)資料
型號(hào)： ADC12L032
廠商： National Semiconductor Corporation
元件分類(lèi)： 串行ADC
英文描述： 3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold(可自行校對(duì)3.3V12位串行輸入/輸出帶MUX，采樣/保持功能A/D轉(zhuǎn)換器)
中文描述： 3.3自校準(zhǔn)12位帶符號(hào)串行I /辦公自動(dòng)化/ D轉(zhuǎn)換器MUX和采樣/保持（可自行校對(duì)3.3V12位串行輸入/輸出帶復(fù)用，采樣/保持功能的A / D轉(zhuǎn)換器）
文件頁(yè)數(shù)： 8/36頁(yè)
文件大小： 819K
代理商： ADC12L032
AC Electrical Characteristics
The following specifications apply for V
+
= V
A
+ = V
D
+ = +3.3 V
DC
, V
REF
+ = +2.500 V
DC
, V
REF
= 0 V
DC
, 12-bit + sign conver-
sion mode, t
r
= t
f
= 3 ns, f
CK
= f
SK
= 5 MHz, R
S
= 25
, source impedance for V
REF
+ and V
REF
≤
25
, fully-differential input
with fixed 1.250V common-mode voltage, and 10(t
CK
) acquisition time unless otherwise specified.
Boldface limits apply for
T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= 25C. (Note 17)
Symbol
Parameter
Conditions
Typical
(Note 10)
10
1
10
0
Limits
(Note 11)
5
Units
(Limits)
MHz (max)
MHz (min)
MHz (max)
Hz (min)
% (min)
% (max)
% (min)
% (max)
(max)
μs (max)
(max)
μs (max)
(min)
μs (min)
μs (max)
(min)
(max)
μs (min)
μs (max)
(min)
(max)
μs (min)
μs (max)
(min)
(max)
μs (min)
μs (max)
(max)
μs (max)
(max)
μs (max)
(min)
(max)
μs (min)
μs (max)
(max)
f
CK
Conversion Clock (CCLK) Frequency
f
SK
Serial Data Clock SCLK Frequency
5
Conversion Clock Duty Cycle
40
60
40
60
Serial Data Clock Duty Cycle
t
C
Conversion Time
12-Bit + Sign or 12-Bit
44(t
CK
)
44(t
CK
)
8.8
21(t
CK
)
4.2
6(t
CK
)
7(t
CK
)
1.2
1.4
10(t
CK
)
11(t
CK
)
2.0
2.2
18(t
CK
)
19(t
CK
)
3.6
3.8
34(t
CK
)
35(t
CK
)
6.8
7.0
4944(t
CK
)
988.8
76(t
CK
)
15.2
2(t
CK
)
3(t
CK
)
0.40
0.60
9(t
SK
)
8-Bit + Sign or 8-Bit
21(t
CK
)
t
A
Acquisition Time
(Note 19)
6 Cycles Programmed
6(t
CK
)
10 Cycles Programmed
10(t
CK
)
18 Cycles Programmed
18(t
CK
)
34 Cycles Programmed
34(t
CK
)
t
CAL
Self-Calibration Time
4944(t
CK
)
t
AZ
Auto-Zero Time
76(t
CK
)
t
SYNC
Self-Calibration or Auto-Zero
Synchronization Time
from DOR
2(t
CK
)
t
DOR
DOR High Time when CS is Low
Continuously
for Read Data and Software Power
Up/Down
CONV Valid Data Time
9(t
SK
)
1.8
μs (max)
t
CONV
8(t
SK
)
8(t
SK
)
1.6
700
(max)
μs (max)
μs (max)
t
HPU
Hardware Power-Up Time, Time from
PD Falling Edge to EOC Rising Edge
250
A
www.national.com
8
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