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參數(shù)資料
| 型號： | ADM1033ARQ-REEL |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT |
| 封裝： | MO-137AB, QSOP-16 |
| 文件頁數(shù)： | 18/39頁 |
| 文件大?。?/td> | 819K |
| 代理商： | ADM1033ARQ-REEL |
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ADM1033
Rev. 0 | Page 25 of 40
FAN DRIVE SIGNAL
The ADM1033 controls the speed of a cooling fan. Varying the
duty cycle (on/off time) of a square wave applied to the fan
varies the speed of the fan. The ADM1033 uses a control
method called synchronous speed control, in which the PWM
drive signal applied to the fan is synchronized with the fan’s
TACH signal. See the Synchronous Speed Control section.
The external circuitry required to drive the fan is simple. A
single N-channel MOSFET is the only drive device required.
The specifications of the MOSFET depend on the maximum
current required by the fan and the gate voltage drive (VGS < 3 V
for direct interfacing to the drive pin). VGS can be greater than
3 V, as long as the pull-up on the gate is tied to 5 V. The MOSFET
should also have a low on resistance to ensure that there is no
significant voltage drop across the FET. A high on resistance
reduces the voltage applied across the fan and, therefore, the
maximum operating speed of the fan. Figure 34 shows a scheme
for driving a 3-wire fan.
12V
FAN
1N4148
Q1
NDT3055L
ADM1033
DRIVE
TACH
04
93
7-
0-
03
2
3.3V
100k
10k
4.7k
12V
Figure 34. Interfacing a 3-Wire Fan to the ADM1033 Using an
N-Channel MOSFET
Figure 34 uses a 10 k pull-up resistor for the TACH signal.
This assumes that the TACH signal is an open collector from
the fan. In all cases, the fan’s TACH signal must be kept below 5
V maximum to prevent damaging the ADM1033.
If in doubt as to whether a fan has an open collector or totem-
pole TACH output, use one of the input signal conditioning
circuits shown in the Fan Inputs section.
When designing drive circuits with transistors and FETs, make
sure that the drive pins are not required to source current and
that they sink less than the maximum current specified.
SYNCHRONOUS SPEED CONTROL
The ADM1033 drives the fan using a control scheme called
synchronous speed control. In this scheme, the PWM drive
signal applied to the fan is synchronized with the TACH signal.
Accurate and repeatable fan speed measurements are the main
benefits. The fan is allowed to run reliably at speeds as low as
30 % of the full capability.
The drive signal applied to the fan is synchronized with the
TACH signal. The ADM1033 switches on the drive signal and
waits for a transition on the TACH signal. When a transition
takes place on the TACH signal, the PWM drive is switched off
for a period of time called tOFF. The drive signal is then switched
on again. The tOFF time is varied in order to vary the fan speed.
If the fan runs too fast, the tOFF time is increased. If the fan runs
too slow, the tOFF time is decreased.
Because the drive signal is synchronized with the TACH signal,
the frequency with which the fan is driven depends on the cur-
rent speed of the fan and the number of poles in it.
Figure 35 shows how the synchronous speed drive signal works.
The ideal TACH signal is the signal that would be output from
the fan, if power were applied 100% of the time. It is representa-
tive of the actual speed of the fan. The actual TACH signal is the
signal seen on the TACH output from the fan, if using a scope.
In effect, the actual TACH signal is the ideal TACH signal
chopped with the drive signal.
IDEAL TACH
POLE TRANSITION POINTS
DASH = TACH FLOATS HIGH BY PULL-UP RESISTOR
SOLID = TRUE TACH WHEN FAN IS POWERED
DRIVE
ACTUAL TACH
tOFF
tPOLE
04
93
7-
0-
03
3
Figure 35. Drive Signal by Using Synchronous Control
Rev. 1 | Page 25 of 39 | www.onsemi.com
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