
ADMtek Inc.
V1.0
3.2
MAC Interface...............................................................................................3-13
3.2.1
Reduced Media Independent Interface (RMII)......................................3-14
3.2.2
Receive Path for 100M...........................................................................3-14
3.2.3
Receive Path for 10M.............................................................................3-16
3.2.4
Transmit Path for 100M ........................................................................3-16
3.2.5
Transmit Path for 10M ..........................................................................3-16
3.2.6
Serial and Source Synchronous Media Independent Interface..............3-17
3.2.7
100M Receive Path................................................................................3-18
3.2.8
10M Receive Path..................................................................................3-19
3.2.9
100M Transmit Path..............................................................................3-20
3.2.10
10M Transmit Path................................................................................3-20
3.3
LED Display..................................................................................................3-21
3.3.1
Single Color LED...................................................................................3-21
3.3.2
Dual Color LED.....................................................................................3-23
3.3.3
Serial Output LED Status ......................................................................3-23
3.3.4
RMII Mode (RSMODE1 = 1).................................................................3-24
3.3.5
SMII/SS_SMII Mode (RSMODE1 = 0)..................................................3-24
3.4
Management Register Access........................................................................3-24
3.4.1
Preamble Suppression ...........................................................................3-25
3.4.2
Reset Operation .....................................................................................3-25
3.5
Power Management .......................................................................................3-26
3.5.1
Medium Detect Power Saving................................................................3-26
3.5.2
Transmit Power Saving..........................................................................3-27
3.6
Voltage Regulator..........................................................................................3-28
Chapter 4 Register Description....................................................................................4-1
4.1
Register Mapping.............................................................................................4-1
4.2
Register Bit Mapping.......................................................................................4-2
4.2.1
Register #0h -- Control Register..............................................................4-2
4.2.2
Register #1h – Status Register.................................................................4-2
4.2.3
Register #2h – PHY ID Register (002E)..................................................4-2
4.2.4
Register #3h – PHY ID Register (CC11).................................................4-2
4.2.5
Register #4h – Advertisement Register....................................................4-2
4.2.6
Register #5h – Link Partner Ability Register...........................................4-2
4.2.7
Register #6h – Auto Negotiation Expansion Register..............................4-2
4.2.8
Register #7h – # Fh Reserved..................................................................4-2
4.2.9
Register #10h – PHY Configuration Register..........................................4-2
4.2.10
Register #11h – 10M Configuration Register..........................................4-3
4.2.11
Register #12h – 100M Configuration Register........................................4-3
4.2.12
Register #13h – LED Configuration Register..........................................4-3
4.2.13
Register #14h – Interrupt Enable Register..............................................4-3
4.2.14
Register #16h – PHY Generic Status Register.........................................4-3
4.2.15
Register #17h – PHY Specific Status Register.........................................4-3
4.2.16
Register #18h – Recommend Value Storage Register .............................4-3
4.2.17
Register #19h – Interrupt Status Register................................................4-3
4.2.18
Register #1dh – Receive Error Counter ..................................................4-4
4.2.19
Register #1eh – Chip ID (8888
)
...............................................................4-4
ADM7008
ii