參數(shù)資料
型號(hào): ADP1871ACPZ-0.3-R7
廠商: ANALOG DEVICES INC
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, PDSO10
封裝: 3 X 3 MM, ROHS COMPLIANT, LFCSP-10
文件頁數(shù): 4/44頁
文件大小: 1958K
代理商: ADP1871ACPZ-0.3-R7
ADP1870/ADP1871
Parameter
ADP1870ARMZ-0.6/
ADP1871ARMZ-0.6 (600 kHz)
On-Time
Minimum On-Time
Minimum Off-Time
ADP1870ARMZ-1.0/
ADP1871ARMZ-1.0 (1.0 MHz)
On-Time
Minimum On-Time
Minimum Off-Time
OUTPUT DRIVER CHARACTERISTICS
High-Side Driver
Output Source Resistance
Output Sink Resistance
Rise Time
2
Fall Time
2
Low-Side Driver
Output Source Resistance
Output Sink Resistance
Rise Time
2
Fall Time
2
Propagation Delays
DRVL Fall to DRVH Rise
2
DRVH Fall to DRVL Rise
2
SW Leakage Current
Integrated Rectifier
Channel Impedance
PRECISION ENABLE THRESHOLD
Logic High Level
Enable Hysteresis
COMP VOLTAGE
COMP Clamp Low Voltage
Rev. A | Page 4 of 44
Symbol
Conditions
Min
Typ
600
Max
Unit
kHz
V
IN
= 5 V, V
OUT
= 2 V, T
J
= 25°C
V
IN
= 20 V, V
OUT
= 0.8 V
65% duty cycle (maximum)
500
540
82
340
1.0
580
110
400
ns
ns
ns
MHz
t
r,DRVH
t
f,DRVH
t
r,DRVL
t
f,DRVL
t
tpdhDRVH
t
tpdhDRVL
I
SWLEAK
V
COMP(low)
V
IN
= 5 V, V
OUT
= 2 V, T
J
= 25°C
V
IN
= 20 V
45% duty cycle (maximum)
I
SOURCE
= 1.5 A, 100 ns, positive pulse (0 V to 5 V)
I
SINK
= 1.5 A, 100 ns, negative pulse (5 V to 0 V)
V
BST
V
SW
= 4.4 V, C
IN
= 4.3 nF (see Figure 60)
V
BST
V
SW
= 4.4 V, C
IN
= 4.3 nF (see Figure 61)
I
SOURCE
= 1.5 A, 100 ns, positive pulse (0 V to 5 V)
I
SINK
= 1.5 A, 100 ns, negative pulse (5 V to 0 V)
V
REG
= 5.0 V, C
IN
= 4.3 nF (see Figure 61)
V
REG
= 5.0 V, C
IN
= 4.3 nF (see Figure 60)
V
BST
V
SW
= 4.4 V (see Figure 60)
V
BST
V
SW
= 4.4 V (see Figure 61)
V
BST
= 25 V, V
SW
= 20 V, V
REG
= 5 V
I
SINK
= 10 mA
V
IN
= 2.9 V to 20 V, V
REG
= 2.75 V to 5.5 V
V
IN
= 2.9 V to 20 V, V
REG
= 2.75 V to 5.5 V
From disabled state, release COMP/EN pin to enable
device (2.75 V ≤ V
REG
≤ 5.5 V)
(2.75 V ≤ V
REG
≤ 5.5 V)
(2.75 V ≤ V
REG
≤ 5.5 V)
Rising temperature
285
245
0.47
312
60
340
2.25
0.7
25
11
1.6
0.7
18
16
15.4
18
22
285
37
340
85
400
3
1
2.2
1
110
330
ns
ns
ns
Ω
Ω
ns
ns
Ω
Ω
ns
ns
ns
ns
μA
Ω
mV
mV
V
COMP Clamp High Voltage
COMP Zero Current Threshold
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Hiccup Current Limit Timing
1
The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure
MOSFETs being Infineon BSC042N03MSG.
2
Not automatic test equipment (ATE) tested.
V
COMP(high)
V
COMP_ZCT
T
TMSD
1.07
155
15
6
2.55
V
V
°C
°C
ms
and Figure 61), C
GATE
= 4.3 nF, and the upper- and lower-side
60
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