6 Applies to CLKIN only.
參數(shù)資料
型號: ADSP-21160NKB-100
廠商: Analog Devices Inc
文件頁數(shù): 7/48頁
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 32BIT 400BGA
產(chǎn)品培訓模塊: SHARC Processor Overview
標準包裝: 1
系列: SHARC®
類型: 浮點
接口: 主機接口,連接端口,串行端口
時鐘速率: 100MHz
非易失內(nèi)存: 外部
芯片上RAM: 512kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.90V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 400-BBGA
供應商設備封裝: 400-PBGA(27x27)
包裝: 托盤
–15–
REV. 0
ADSP-21160N
ABSOLUTE MAXIMUM RATINGS
ESD SENSITIVITY
6 Applies to CLKIN only.
7 Applies to all pins with keeper latches: ADDR31–0, DATA63–0, PAGE, BRST, CLKOUT.
8 Current required to switch from kept high to low or from kept low to high.
9 Characterized, but not tested.
10Applies to three-statable pins: DATA63–0, ADDR31–0, PAGE, CLKOUT, ACK, FLAG3–0, REDY,
HBG, BMS, BR6–1, TFSx, RFSx, TDO.
11Applies to three-statable pins with internal pull-ups: DTx, TCLKx, RCLKx,
EMU.
12Applies to three-statable pins with internal pull-ups:
MS3–0, RDx, WRx, DMAGx, PA, CIF.
13Applies to three-statable pins with internal pull-downs: LxDAT7–0, LxCLK, LxACK.
14Applies to ACK pulled up internally with 2 k
during reset or ID2–0 = 00x.
15The test program used to measure IDD-INPEAK represents worst-case processor operation and is not sustainable under normal application conditions. Actual
internal power measurements made using typical applications are less than specified. For more information, see Power Dissipation on Page 40.
16IDD-INHIGH is a composite average based on a range of high activity code. For more information, see Power Dissipation on Page 40.
17IDD-INLOW is a composite average based on a range of low activity code. For more information, see Power Dissipation on Page 40.
18Idle denotes ADSP-21160N state during execution of IDLE instruction. For more information, see Power Dissipation on Page 40.
19Applies to all signal pins.
20Guaranteed, but not tested.
Internal (Core) Supply Voltage (VDDINT)
1 . . –0.3 V to +2.3 V
1 Stresses greater than those listed above may cause permanent damage to the
device. These are stress ratings only; functional operation of the device at these
or any other conditions greater than those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
Analog (PLL) Supply Voltage (AVDD)
1 . . . . –0.3 V to +2.3 V
External (I/O) Supply Voltage (VDDEXT)
1 . . –0.3 V to +4.6 V
Input Voltage
1 . . . . . . . . . . . . . . . . –0.5 V to V
DDEXT + 0.5 V
Output Voltage Swing
1 . . . . . . . . . –0.5 V to V
DDEXT + 0.5 V
Load Capacitance
1 . . . . . . . . . . . . . . . . . . . . . . . . . .200 pF
Storage Temperature Range
1 . . . . . . . . . . .–65
°C to +150°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the ADSP-21160N features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
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