參數(shù)資料
型號(hào)： ADSP-21991
廠商： Analog Devices, Inc.
元件分類(lèi)： 數(shù)字信號(hào)處理
英文描述： SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
中文描述： SigmaDSP的28-/56-Bit音頻處理器雙ADC和4個(gè)DAC
文件頁(yè)數(shù)： 26/44頁(yè)
文件大?。?/td> 589K
代理商： ADSP-21991
ADSP-21991
–26–
REV. 0
External Port Write Cycle Timing
Table 8
and
Figure 9
describe external port write operations.
The external port lets systems extend read/write accesses in three
ways: wait states, ACK input, and combined wait states and
ACK. To add waits with ACK, the DSP must see ACK low at
the rising edge of EMI clock. ACK low causes the DSP to wait,
and the DSP requires two EMI clock cycles after ACK goes high
to finish the access. For more information, see the External Port
chapter in the
ADSP-2199x DSP Hardware Reference
.
Table 8. External Port Write Cycle Timing
Parameter
1, 2
Timing Requirements
t
AKW
t
DWSAK
Min
Max
Unit
ACK Strobe Pulsewidth
ACK Delay from
XMS
Low
12.5
ns
ns
0.5t
EMICLK
–1
Switching Characteristics
t
CSWS
t
AWS
t
WSCS
t
WSA
t
WW
t
CDA
t
CDD
t
DSW
t
DHW
t
DHW
t
WWR
Chip Select Asserted to
WR
Asserted Delay
Address Valid to
WR
Setup and Delay
WR
Deasserted to Chip Select Deasserted
WR
Deasserted to Address Invalid
WR
Strobe Pulsewidth
WR
to Data Enable Access Delay
WR
to Data Disable Access Delay
Data Valid to
WR
Deasserted Setup
WR
Deasserted to Data Invalid Hold Time; E_WHC
4,
5
WR
Deasserted to Data Invalid Hold Time; E_WHC
4,
6
WR
Deasserted to
WR
,
RD
Asserted
0.5t
EMICLK
–4
0.5t
EMICLK
–3
0.5t
EMICLK
–4
0.5t
EMICLK
–3
t
EMICLK
–2+W
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
0.5t
EMICLK
+4
t
EMICLK
+7+W
3
0.5t
EMICLK
–3
t
EMICLK
+1+W
3
3.4
t
EMICLK
+3.4
t
HCLK
1
t
EMICLK
is the External Memory Interface clock period. t
HCLK
is the peripheral clock period.
2
These are timing parameters that are based on worst-case operating conditions.
3
W = (number of wait states specified in wait register) t
EMICLK
.
4
Write hold cycle–memory select control registers (MS CTL).
5
Write wait state count (E_WWC) = 0
6
Write wait state count (E_WWC) = 1
Figure 9. External Port Write Cycle Timing
D15–0
t
AWS
t
WW
t
AKW
t
DHW
t
CDD
ACK
WR
A21–0
MS3–0
IOMS
BMS
t
CSWS
t
WSA
t
WSCS
t
CDA
t
DWSAK
RD
t
DSW
t
WWR
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ADSP-21991BBC 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin Mini-BGA
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ADSP-21991BST 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 160MHz 160MIPS 176-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:HIGH PERFORMANCE MIXED SIGNAL DSP - Bulk
ADSP-21991BSTZ 功能描述:IC DSP CONTROLLER 16BIT 176-LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤(pán)
ADSP-21992BBC 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 150MHz 150MIPS 196-Pin CSP-BGA 制造商:Rochester Electronics LLC 功能描述:MIXED SIGNAL DSP W/32K DM RAM& 16K PMRAM - Bulk
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