參數(shù)資料
型號: ADT7463ARQ
廠商: ANALOG DEVICES INC
元件分類: 模擬信號調(diào)理
英文描述: dB COOL Remote Thermal Controller and Voltage Monitor
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO24
封裝: MO-137AE, QSOP-24
文件頁數(shù): 36/53頁
文件大?。?/td> 719K
代理商: ADT7463ARQ
REV. 0
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ADT7463
Table XII. Register 0x40 – Configuration Register 1 (Power-On Default = 0x00)
Bit
<0>
Name
STRT
R/W
Read/Write
Description
Logic 1 enables monitoring and PWM control outputs based on the limit settings pro-
grammed. Logic 0 disables monitoring and PWM control based on the default power-up
limit settings. Note that the limit values programmed are preserved even if a logic 0 is
written to this bit and the default settings are enabled. This bit becomes read-only and
cannot be changed once Bit 1 (LOCK bit) has been written. All limit registers should be
programmed by BIOS before setting this bit to 1. (Lockable.)
Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable
registers become read-only and cannot be modified until the ADT7463 is powered down
and powered up again. This prevents rogue programs such as viruses from modifying
critical system limit settings. (Lockable.)
This bit gets set to 1 by the ADT7463 to indicate that the device is fully powered-up
and ready to begin systems monitoring.
When set to 1, this runs all fans at full speed. Power-on default = 0. This bit does not get
locked at any time.
BIOS should set this bit to a 1 when the ADT7463 is configured to measure current
from an ADI ADOPT
TM
VRM controller and measure the CPU’s core voltage. This will
allow monitoring software to display CPU watts usage. (Lockable.)
Logic 1 disables fan spin-up for two TACH pulses. Instead, the PWM outputs will go
high for the entire fan spin-up timeout selected.
When this bit is set to 1, the SMBus timeout feature is disabled. This allows the
ADT7463 to be used with SMBus controllers that cannot handle SMBus
timeouts. (Lockable.)
When this bit is set to 1, the ADT7463 rescales its V
CC
pin to measure a 5 V supply. If
this bit is 0, the ADT7463 measures V
CC
as a 3.3 V supply. (Lockable.)
<1>
LOCK
Write Once
<2>
RDY
Read Only
<3>
FSPD
Read/Write
<4>
V I
Read/Write
<5>
FSPDIS
Read/Write
<6>
TODIS
Read/Write
<7>
V
CC
Read/Write
Table XIII. Register 0x41 – Interrupt Status Register 1 (Power-On Default = 0x00)
Bit
<0>
Name
2.5 V
R/W
Read Only
Description
A one indicates the 2.5 V
High or Low limit has been exceeded. This bit gets cleared on
a read of the Status Register only if the error condition has subsided.
A one indicates the V
CCP
High or Low limit has been exceeded. This bit gets cleared on
a read of the Status Register only if the error condition has subsided.
A one indicates the V
CC
High or Low limit has been exceeded. This bit gets cleared on a
read of the Status Register only if the error condition has subsided.
A one indicates the 5 V High or Low limit has been exceeded. This bit gets cleared on a
read of the Status Register only if the error condition has subsided.
A one indicates the Remote 1 Low or High Temp limit has been exceeded. This bit gets
cleared on a read of the Status Register only if the error condition has subsided.
A one indicates the Local Low or High Temp limit has been exceeded. This bit gets
cleared on a read of the Status Register only if the error condition has subsided.
A one indicates the Remote 2 Low or High Temp limit has been exceeded. This bit gets
cleared on a read of the Status Register only if the error condition has subsided.
A one indicates that an Out-of-Limit event has been latched in Status Register 2. This
bit is a logical OR of all status bits in Status Register 2. Software can test this bit in
isolation to determine whether any of the voltage, temperature, or fan speed readings
represented by Status Register 2 are out-of-limit. This saves the need to read Status
Register 2 every interrupt or polling cycle.
<1>
V
CCP
Read Only
<2>
V
CC
Read Only
<3>
5 V
Read Only
<4>
R1T
Read Only
<5>
LT
Read Only
<6>
R2T
Read Only
<7>
OOL
Read Only
ADOPT is a trademark of Analog Devices, Inc.
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