參數(shù)資料
型號(hào)： ADUC7024BSTZ62
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 76/104頁(yè)
文件大?。?/td> 0K
描述： IC MCU FLASH 62K ANLG I/O 64LQFP
產(chǎn)品培訓(xùn)模塊： ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
Pulse Oximetry Solutions
Process Control
設(shè)計(jì)資源： Sensing Low-g Acceleration Using ADXL345 Digital Accelerometer Connected to ADuC7024 (CN0133)
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 44MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設(shè)備： PLA，PWM，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 30
程序存儲(chǔ)器容量： 64KB（32K x 16）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 2K x 32
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 10x12b; D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 64-LQFP
包裝： 托盤(pán)
Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 73 of 104
Table 108. COMSTA1 Register
Name
Address
Default Value
Access
COMSTA1
0xFFFF0718
0x00
R
COMSTA1 is a modem status register.
Table 109. COMSTA1 MMR Bit Descriptions
Bit
Name
Description
7
DCD
Data carrier detect.
6
RI
Ring indicator.
5
DSR
Data set ready.
4
CTS
Clear to send.
3
DDCD
Delta DCD. Set automatically if DCD changed
state since last COMSTA1 read. Cleared automati-
cally by reading COMSTA1.
2
TERI
Trailing edge RI. Set if RI changed from 0 to 1
since COMSTA1 was last read. Cleared
automatically by reading COMSTA1.
1
DDSR
Delta DSR. Set automatically if DSR changed state
since COMSTA1 was last read. Cleared
automatically by reading COMSTA1.
0
DCTS
Delta CTS. Set automatically if CTS changed state
since COMSTA1 was last read. Cleared
automatically by reading COMSTA1.
Table 110. COMSCR Register
Name
Address
Default Value
Access
COMSCR
0xFFFF071C
0x00
R/W
COMSCR is an 8-bit scratch register used for temporary
storage. It is also used in network addressable UART mode.
Table 111. COMDIV2 Register
Name
Address
Default Value
Access
COMDIV2
0xFFFF072C
0x0000
R/W
COMDIV2 is a 16-bit fractional baud divide register.
Table 112. COMDIV2 MMR Bit Descriptions
Bit
Name
Description
15
FBEN
Fractional baud rate generator enable bit.
Set by user to enable the fractional baud
rate generator. Cleared by user to generate
baud rate using the standard 450 UART
baud rate generator.
14:13
Reserved.
12:11
FBM[1:0]
M if FBM = 0, M = 4 (see the Fractional
Divider section).
10:0
FBN[10:0]
N (see the Fractional Divider section).
Network Addressable UART Mode
This mode connects the MicroConverter to a 256-node serial
network, either as a hardware single master or via software in a
multimaster network. Bit 7 (ENAM) of the COMIEN1 register
must be set to enable UART in network addressable mode (see
Table 114). Note that there is no parity check in this mode.
Network Addressable UART Register Definitions
Four additional registers, COMIEN0, COMIEN1, COMIID1, and
COMADR are used in network addressable UART mode only.
In network address mode, the least significant bit of the COMIEN1
register is the transmitted network address control bit. If set to
1, the device is transmitting an address. If cleared to 0, the
device is transmitting data. For example, the following master-
based code transmits the slave’s address followed by the data:
COMIEN1
= 0xE7;
//Setting ENAM,
E9BT, E9BR, ETD, NABP
COMTX = 0xA0;
// Slave address is 0xA0
while(!(0x020==(COMSTA0 & 0x020))){} //
wait for adr tx to finish.
COMIEN1
= 0xE6;
//
Clear NAB bit
to indicate Data is coming
COMTX = 0x55; // Tx data to slave: 0x55
Table 113. COMIEN1 Register
Name
Address
Default Value
Access
COMIEN1
0xFFFF0720
0x04
R/W
COMIEN1 is an 8-bit network enable register.
Table 114. COMIEN1 MMR Bit Descriptions
Bit
Name
Description
7
ENAM
Network address mode enable bit. Set by user to
enable network address mode. Cleared by user to
disable network address mode.
6
E9BT
9-bit transmit enable bit. Set by user to enable
9-bit transmit. ENAM must be set. Cleared by user
to disable 9-bit transmit.
5
E9BR
9-bit receive enable bit. Set by user to enable
9-bit receive. ENAM must be set. Cleared by user
to disable 9-bit receive.
4
ENI
Network interrupt enable bit.
3
E9BD
Word length. Set for 9-bit data. E9BT has to be
cleared. Cleared for 8-bit data.
2
ETD
Transmitter pin driver enable bit. Set by user to
enable SOUT pin as an output in slave mode or
multimaster mode. Cleared by user; SOUT is
three-state.
1
NABP
Network address bit. Interrupt polarity bit.
0
NAB
Network address bit (if NABP = 1). Set by user to
transmit the slave address. Cleared by user to
transmit data.
Table 115. COMIID1 Register
Name
Address
Default Value
Access
COMIID1
0xFFFF0724
0x01
R
COMIID1 is an 8-bit network interrupt register. Bit 7 to Bit 4
are reserved (see Table 116).
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