參數(shù)資料
型號: ADUC7039BCP6Z
廠商: Analog Devices Inc
文件頁數(shù): 15/92頁
文件大?。?/td> 0K
描述: IC MCU ARM7 BATT SENSER 32LFCSP
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI
外圍設(shè)備: POR,溫度傳感器,WDT
輸入/輸出數(shù): 6
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
RAM 容量: 1K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 115°C
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
包裝: 托盤
ADuC7039
Data Sheet
Rev. D | Page 22 of 92
FLASH/EE MEMORY SECURITY
The 62 kB of Flash/EE memory available to the user can be
read- and write-protected using the FEEHID register.
The MSB of FEEHID (Bit 31) protects the entire Flash/EE from
being read through JTAG.
Bits[30:0] of FEEHID protect Page 123 to Page 0 from writing.
Each bit protects four pages, that is, 2 kB.
The FEEPRO register mirrors the bit definitions of the FEEHID
MMR. The FEEPRO MMR allows user code to lock the pro-
tection or security configuration of the Flash/EE memory so
that the protection configuration is automatically loaded on
subsequent power-on or reset events. This flexibility allows
the user to temporarily set and test protection settings using
the FEEHID MMR and, subsequently, lock the required
protection configuration (using FEEPRO) when shipping
protection systems into the field.
Flash/EE Memory Protection Registers
Name:
FEEHID and FEEPRO
Address:
0xFFFF0E20 (for FEEHID) and 0xFFFF0E1C (for FEEPRO)
Default Value:
0xFFFFFFFF (for FEEHID) and 0x00000000 (for FEEPRO)
Access:
Read/write
Function:
These registers are written by user code to configure the protection of the Flash/EE memory.
Table 13. FEEHID and FEEPRO MMR Bit Designations
Bit
Description
31
Read protection.
This bit is cleared by user code to read protect the 62 kB Flash/EE block code.
This bit is set by user code to allow read access to the 62 kB Flash/EE block via JTAG.
30 to 0
Write protection bits.
When set by user code, these bits unprotect Page 0 to Page 123 of the 62 kB Flash/EE code memory. Each bit write
protects four pages, and each page consists of 512 bytes.
When cleared by user code, these bits write protect Page 0 to Page 123 of the 62 kB Flash/EE code memory. Each bit
write protects four pages, and each page consists of 512 bytes.
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