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參數(shù)資料
| 型號(hào)： | ADV7180BCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 41/116頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO DECODER SDTV 40-LFCSP |
| 設(shè)計(jì)資源： | Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076) |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 視頻解碼器 |
| 應(yīng)用： | 數(shù)碼相機(jī)，手機(jī)，便攜式視頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADV7180LQEBZ-ND - BOARD EVALUATION ADV7180 EVAL-ADV7180LFEBZ-ND - BOARD EVAL FOR ADV7180 LFCSP |
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ADV7180
Data Sheet
Rev. I | Page 30 of 116
SD_OFF_Cb[7:0], SD Offset Cb Channel, Address 0xE1[7:0]
This register allows the user to select an offset for the Cb channel
only and to adjust the hue of the picture. There is a functional
overlap with the HUE[7:0] register.
Table 30. SD_OFF_Cb Function
SD_OFF_Cb[7:0]
Description
0x80 (default)
0 mV offset applied to the Cb channel
0x00
312 mV offset applied to the Cb channel
0xFF
+312 mV offset applied to the Cb channel
SD_OFF_Cr[7:0], SD Offset Cr Channel, Address 0xE2[7:0]
This register allows the user to select an offset for the Cr channel
only and to adjust the hue of the picture. There is a functional
overlap with the HUE[7:0] register.
Table 31. SD_OFF_Cr Function
SD_OFF_Cr[7:0]
Description
0x80 (default)
0 mV offset applied to the Cr channel
0x00
312 mV offset applied to the Cr channel
0xFF
+312 mV offset applied to the Cr channel
BRI[7:0], Brightness Adjust, Address 0x0A[7:0]
This register controls the brightness of the video signal. It allows
the user to adjust the brightness of the picture.
Table 32. BRI Function
BRI[7:0]
Description
0x00 (default)
Offset of the luma channel = 0 IRE
0x7F
Offset of the luma channel = +30 IRE
0x80
Offset of the luma channel = 30 IRE
HUE[7:0], Hue Adjust, Address 0x0B[7:0]
This register contains the value for the color hue adjustment. It
allows the user to adjust the hue of the picture.
HUE[7:0] has a range of ±90°, with 0x00 equivalent to an
adjustment of 0°. The resolution of HUE[7:0] is 1 bit = 0.7°.
The hue adjustment value is fed into the AM color demodulation
block. Therefore, it applies only to video signals that contain
chroma information in the form of an AM-modulated carrier
(CVBS or Y/C in PAL or NTSC). It does not affect SECAM
and does not work on component video inputs (YPrPb).
Table 33. HUE Function
HUE[7:0]
Description (Adjust Hue of the Picture)
0x00 (default)
Phase of the chroma signal = 0°
0x7F
Phase of the chroma signal = 90°
0x80
Phase of the chroma signal = +90°
DEF_Y[5:0], Default Value Y, Address 0x0C[7:2]
When the ADV7180 loses lock on the incoming video signal or
when there is no input signal, the DEF_Y[5:0] register allows
the user to specify a default luma value to be output. This value
is used under the following conditions:
If the DEF_VAL_AUTO_EN bit is set to high and the
ADV7180 has lost lock to the input video signal. This is
the intended mode of operation (automatic mode).
The DEF_VAL_EN bit is set, regardless of the lock status of
the video decoder. This is a forced mode that may be useful
during configuration.
The DEF_Y[5:0] values define the six MSBs of the output video.
The remaining LSBs are padded with 0s. For example, in 8-bit
mode, the output is Y[7:0] = {DEF_Y[5:0], 0, 0}.
For DEF_Y[5:0], 0x0D (blue) is the default value for Y.
Register 0x0C has a default value of 0x36.
DEF_C[7:0], Default Value C, Address 0x0D[7:0]
The DEF_C[7:0] register complements the DEF_Y[5:0] value. It
defines the four MSBs of Cr and Cb values to be output if
The DEF_VAL_AUTO_EN bit is set to high and the
ADV7180 cannot lock to the input video (automatic mode).
DEF_VAL_EN bit is set to high (forced output).
The data that is finally output from the ADV7180 for the
chroma side is Cr[3:0] = {DEF_C[7:4], 0, 0, 0, 0}, and
Cb[3:0] = {DEF_C[3:0], 0, 0, 0, 0}.
For DEF_C[7:0], 0x7C (blue) is the default value for Cr and Cb.
DEF_VAL_EN, Default Value Enable, Address 0x0C[0]
This bit forces the use of the default values for Y, Cr, and Cb. See
the descriptions in the DEF_Y[5:0], Default Value Y, Address
sections for additional information. In this mode, the decoder
also outputs a stable 27 MHz clock, HS, and VS.
Setting DEF_VAL_EN to 0 (default) outputs a colored screen
determined by user-programmable Y, Cr, and Cb values when
the decoder free-runs. Free-run mode is turned on and off by
the DEF_VAL_AUTO_EN bit.
Setting DEF_VAL_EN to 1 forces a colored screen output
determined by user-programmable Y, Cr, and Cb values.
This overrides picture data even if the decoder is locked.
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