參數(shù)資料
型號: ADV7180BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 37/116頁
文件大小: 0K
描述: IC VIDEO DECODER SDTV 40-LFCSP
設(shè)計資源: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060)
Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
標(biāo)準(zhǔn)包裝: 1
類型: 視頻解碼器
應(yīng)用: 數(shù)碼相機(jī),手機(jī),便攜式視頻
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 40-LFCSP-VQ(6x6)
包裝: 托盤
產(chǎn)品目錄頁面: 788 (CN2011-ZH PDF)
配用: EVAL-ADV7180LQEBZ-ND - BOARD EVALUATION ADV7180
EVAL-ADV7180LFEBZ-ND - BOARD EVAL FOR ADV7180 LFCSP
Data Sheet
ADV7180
Rev. I | Page 27 of 116
SYNC PROCESSING
The ADV7180 extracts syncs embedded in the analog input
video signal. There is currently no support for external HS/VS
inputs. The sync extraction is optimized to support imperfect
video sources, such as VCRs with head switches. The actual
algorithm used employs a coarse detection based on a threshold
crossing, followed by a more detailed detection using an adaptive
interpolation algorithm. The raw sync information is sent to a
line length measurement and prediction block. The output of
this is then used to drive the digital resampling section to
ensure that the ADV7180 outputs 720 active pixels per line.
The sync processing on the ADV7180 also includes the following
specialized postprocessing blocks that filter and condition the
raw sync information retrieved from the digitized analog video:
VSYNC processor. This block provides extra filtering of the
detected VSYNCs to improve vertical lock.
HSYNC processor. The HSYNC processor is designed to
filter incoming HSYNCs that have been corrupted by
noise, providing much improved performance for video
signals with a stable time base but poor SNR.
VBI DATA RECOVERY
The ADV7180 can retrieve the following information from the
input video:
Wide screen signaling (WSS)
Copy generation management system (CGMS)
Closed captioning (CCAP)
Macrovision protection presence
EDTV data
Gemstar-compatible data slicing
Teletext
VITC/VPS
The ADV7180 is also capable of automatically detecting the
incoming video standard with respect to
Color subcarrier frequency
Field rate
Line rate
The ADV7180 can configure itself to support PAL B/D/I/G/H,
PAL M, PAL N, PAL Combination N, NTSC M, NTSC J,
SECAM 50 Hz/60 Hz, NTSC 4.43, and PAL 60.
GENERAL SETUP
Video Standard Selection
The VID_SEL[3:0] bits (Address 0x00[7:4]) allow the user to
force the digital core into a specific video standard. Under normal
circumstances, this is not necessary. The VID_SEL[3:0] bits
default to an autodetection mode that supports PAL, NTSC,
SECAM, and variants thereof.
Autodetection of SD Modes
To guide the autodetect system of the ADV7180, individual
enable bits are provided for each of the supported video standards.
Setting the relevant bit to 0 inhibits the standard from being
detected automatically. Instead, the system chooses the closest of
the remaining enabled standards. The results of the autodetection
block can be read back via the status registers (see the Global
Status Register section for more information).
VID_SEL[3:0], Address 0x00[7:4]
Table 24. VID_SEL Function
VID_SEL[3:0]
Description
0000 (default)
Autodetect (PAL B/G/H/I/D), NTSC J
(no pedestal), SECAM
0001
Autodetect (PAL B/G/H/I/D), NTSC M
(pedestal), SECAM
0010
Autodetect (PAL N) (pedestal), NTSC J
(no pedestal), SECAM
0011
Autodetect (PAL N) (pedestal), NTSC M
(pedestal), SECAM
0100
NTSC J
0101
NTSC M
0110
PAL 60
0111
NTSC 4.43
1000
PAL B/G/H/I/D
1001
PAL N = PAL B/G/H/I/D (with pedestal)
1010
PAL M (without pedestal)
1011
PAL M
1100
PAL Combination N
1101
PAL Combination N (with pedestal)
1110
SECAM
1111
SECAM (with pedestal)
AD_SEC525_EN, Enable Autodetection of SECAM 525
Line Video, Address 0x07[7]
Setting AD_SEC525_EN to 0 (default) disables the autodetection
of a 525-line system with a SECAM style, FM-modulated color
component.
Setting AD_SEC525_EN to 1 enables the detection of a SECAM
style, FM-modulated color component.
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