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參數(shù)資料
| 型號： | ADV7180BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 43/116頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO DECODER SDTV 40-LFCSP |
| 設(shè)計資源： | Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076) |
| 標準包裝： | 1 |
| 類型： | 視頻解碼器 |
| 應(yīng)用： | 數(shù)碼相機，手機，便攜式視頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 788 (CN2011-ZH PDF) |
| 配用： | EVAL-ADV7180LQEBZ-ND - BOARD EVALUATION ADV7180 EVAL-ADV7180LFEBZ-ND - BOARD EVAL FOR ADV7180 LFCSP |
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ADV7180
Data Sheet
Rev. I | Page 32 of 116
DCT[1:0], Digital Clamp Timing, Address 0x15[6:5]
The clamp timing register determines the time constant of the
digital fine clamp circuitry. It is important to note that the digital
fine clamp reacts quickly because it immediately corrects any
residual dc level error for the active line. The time constant from
the digital fine clamp must be much quicker than the one from
the analog blocks.
By default, the time constant of the digital fine clamp is adjusted
dynamically to suit the currently connected input signal.
Table 34. DCT Function
DCT[1:0]
Description
00 (default)
Slow (TC = 1 sec)
01
Medium (TC = 0.5 sec)
10
Fast (TC = 0.1 sec)
11
Determined by ADV7180, depending on the
input video parameters
DCFE, Digital Clamp Freeze Enable, Address 0x15[4]
This register bit allows the user to freeze the digital clamp loop
at any time. It is intended for users who want to do their own
clamping. To do this, disable the current sources for analog
clamping via the appropriate register bits, wait until the digital
clamp loop settles, and then freeze it via the DCFE bit.
When DCFE is 0 (default), the digital clamp is operational.
When DCFE is 1, the digital clamp loop is frozen.
LUMA FILTER
Data from the digital fine clamp block is processed by the three
sets of filters that follow. Note that the data format at this point
is CVBS for CVBS input or luma only for Y/C and YPrPb input
formats.
Luma antialias filter (YAA). The ADV7180 receives video
at a rate of 28.6363 MHz. (In the case of 4× oversampled
video, the ADC samples at 57.27 MHz, and the first deci-
mation is performed inside the DPP filters. Therefore, the
data rate into the ADV7180 is always 28.6363 MHz.) The
ITU-R BT.601 recommends a sampling frequency of
13.5 MHz. The luma antialias filter decimates the oversampled
video using a high quality linear phase, low-pass filter that
preserves the luma signal while at the same time attenuating
out-of-band components. The luma antialias filter (YAA)
has a fixed response.
Luma shaping filters (YSH). The shaping filter block is a
programmable low-pass filter with a wide variety of responses.
It can be used to selectively reduce the luma video signal
bandwidth (needed prior to scaling, for example). For
some video sources that contain high frequency noise,
reducing the bandwidth of the luma signal improves visual
picture quality. A follow-on video compression stage may
work more efficiently if the video is low-pass filtered.
The ADV7180 has two responses for the shaping filter: one
that is used for good quality composite, component, and SVHS
type sources, and a second for nonstandard CVBS signals.
The YSH filter responses also include a set of notches for
PAL and NTSC. However, using the comb filters for Y/C
separation is recommended.
Digital resampling filter. This block allows dynamic
resampling of the video signal to alter parameters such as
the time base of a line of video. Fundamentally, the resampler
is a set of low-pass filters. The actual response is chosen by
the system with no requirement for user intervention.
Figure 24 through Figure 27 show the overall response of all filters
together. Unless otherwise noted, the filters are set into a typical
wideband mode.
Y Shaping Filter
For input signals in CVBS format, the luma shaping filters play
an essential role in removing the chroma component from a
composite signal. Y/C separation must aim for best possible
crosstalk reduction while still retaining as much bandwidth
(especially on the luma component) as possible. High quality
Y/C separation can be achieved by using the internal comb
filters of the ADV7180. Comb filtering, however, relies on the
frequency relationship of the luma component (multiples of the
video line rate) and the color subcarrier (fSC). For good quality
CVBS signals, this relationship is known; the comb filter algorithms
can be used to separate luma and chroma with high accuracy.
In the case of nonstandard video signals, the frequency relationship
may be disturbed, and the comb filters may not be able to remove
all crosstalk artifacts in the best fashion without the assistance
of the shaping filter block.
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| ADV7180BCPZ | 制造商:Analog Devices 功能描述:IC VIDEO DECODER 10BIT 57.27MSPS LFCSP40 |
| ADV7180BCPZ-REEL | 功能描述:IC VIDEO DECODER SDTV 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ADV7180BST48Z | 功能描述:IC VID DECOD SDTV 10BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標準包裝:250 系列:- 類型:電平移位器 應(yīng)用:LCD 電視機/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
| ADV7180BST48Z-RL | 功能描述:視頻 IC 48-Lead Low Profile Quad Flat Package RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ADV7180BSTZ | 功能描述:IC VIDEO DECODER SDTV 64-LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標準包裝:250 系列:- 類型:電平移位器 應(yīng)用:LCD 電視機/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
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