![](http://datasheet.mmic.net.cn/Analog-Devices-Inc/ADV7180WBCPZ_datasheet_104469/ADV7180WBCPZ_83.png)
Data Sheet
ADV7180
Rev. I | Page 83 of 116
Address
Register Name
RW
7
6
5
4
3
2
1
0
Reset Value (Hex)
Dec
Hex
118
76
VDP_LINE_020
RW
VBI_DATA_
P23_N21[3]
VBI_DATA_
P23_N21[2]
VBI_DATA_
P23_N21[1]
VBI_DATA_
P23_N21[0]
VBI_DATA_
P336_N284[3]
VBI_DATA_
P336_N284[2]
VBI_DATA_
P336_N284[1]
VBI_DATA_
P336_N284[0]
00000000
00
119
77
VDP_LINE_021
RW
VBI_DATA_
P24_N22[3]
VBI_DATA_
P24_N22[2]
VBI_DATA_
P24_N22[1]
VBI_DATA_
P24_N22[0]
VBI_DATA_
P337_N285[3]
VBI_DATA_
P337_N285[2]
VBI_DATA_
P337_N285[1]
VBI_DATA_
P337_N285[0]
00000000
00
120
78
VDP_STATUS
R
TTXT_AVL
VITC_AVL
GS_DATA_
TYPE
GS_PDC_VPS_
UTC_AVL
CGMS_WSS_AVL CC_EVEN_FIELD CC_AVL
120
78
VDP_STATUS_
CLEAR
W
VITC_CLEAR
GS_PDC_VPS_
UTC_CLEAR
CGMS_WSS_
CLEAR
CC_CLEAR
00000000
00
121
79
VDP_CCAP_
DATA_0
R
CCAP_BYTE_1[7] CCAP_BYTE_1[6] CCAP_BYTE_1[5] CCAP_BYTE_1[4] CCAP_BYTE_1[3] CCAP_BYTE_1[2] CCAP_BYTE_1[1] CCAP_BYTE_1[0]
122
7A
VDP_CCAP_
DATA_1
R
CCAP_BYTE_2[7] CCAP_BYTE_2[6] CCAP_BYTE_2[5] CCAP_BYTE_2[4] CCAP_BYTE_2[3] CCAP_BYTE_2[2] CCAP_BYTE_2[1] CCAP_BYTE_2[0]
125
7D
VDP_CGMS_
WSS_DATA_0
R
CGMS_CRC[5]
CGMS_CRC[4]
CGMS_CRC[3]
CGMS_CRC[2]
126
7E
VDP_CGMS_
WSS_DATA_1
R
CGMS_CRC[1]
CGMS_CRC[0]
CGMS_WSS[13]
CGMS_WSS[12]
CGMS_WSS[11]
CGMS_WSS[10]
CGMS_WSS[9]
CGMS_WSS[8]
127
7F
VDP_CGMS_
WSS_DATA_2
R
CGMS_WSS[7]
CGMS_WSS[6]
CGMS_WSS[5]
CGMS_WSS[4]
CGMS_WSS[3]
CGMS_WSS[2]
CGMS_WSS[1]
CGMS_WSS[0]
132
84
VDP_GS_VPS_
PDC_UTC_0
R
GS_VPS_PDC_
UTC_BYTE_0[7]
GS_VPS_PDC_
UTC_BYTE_0[6]
GS_VPS_PDC_
UTC_BYTE_0[5]
GS_VPS_PDC_
UTC_BYTE_0[4]
GS_VPS_PDC_
UTC_BYTE_0[3]
GS_VPS_PDC_
UTC_BYTE_0[2]
GS_VPS_PDC_
UTC_BYTE_0[1]
GS_VPS_PDC_
UTC_BYTE_0[0]
133
85
VDP_GS_VPS_
PDC_UTC_1
R
GS_VPS_PDC_
UTC_BYTE_1[7]
GS_VPS_PDC_
UTC_BYTE_1[6]
GS_VPS_PDC_
UTC_BYTE_1[5]
GS_VPS_PDC_
UTC_BYTE_1[4]
GS_VPS_PDC_
UTC_BYTE_1[3]
GS_VPS_PDC_
UTC_BYTE_1[2]
GS_VPS_PDC_
UTC_BYTE_1[1]
GS_VPS_PDC_
UTC_BYTE_1[0]
134
86
VDP_GS_VPS_
PDC_UTC_2
R
GS_VPS_PDC_
UTC_BYTE_2[7]
GS_VPS_PDC_
UTC_BYTE_2[6]
GS_VPS_PDC_
UTC_BYTE_2[5]
GS_VPS_PDC_
UTC_BYTE_2[4]
GS_VPS_PDC_
UTC_BYTE_2[3]
GS_VPS_PDC_
UTC_BYTE_2[2]
GS_VPS_PDC_
UTC_BYTE_2[1]
GS_VPS_PDC_
UTC_BYTE_2[0]
135
87
VDP_GS_VPS_
PDC_UTC_3
R
GS_VPS_PDC_
UTC_BYTE_3[7]
GS_VPS_PDC_
UTC_BYTE_3[6]
GS_VPS_PDC_
UTC_BYTE_3[5]
GS_VPS_PDC_
UTC_BYTE_3[4]
GS_VPS_PDC_
UTC_BYTE_3[3]
GS_VPS_PDC_
UTC_BYTE_3[2]
GS_VPS_PDC_
UTC_BYTE_3[1]
GS_VPS_PDC_
UTC_BYTE_3[0]
136
88
VDP_VPS_
PDC_UTC_4
R
VPS_PDC_UTC_
BYTE_4[7]
VPS_PDC_UTC_
BYTE_4[6]
VPS_PDC_UTC_
BYTE_4[5]
VPS_PDC_UTC_
BYTE_4[4]
VPS_PDC_UTC_
BYTE_4[3]
VPS_PDC_UTC_
BYTE_4[2]
VPS_PDC_UTC_
BYTE_4[1]
VPS_PDC_UTC_
BYTE_4[0]
137
89
VDP_VPS_
PDC_UTC_5
R
VPS_PDC_UTC_
BYTE_5[7]
VPS_PDC_UTC_
BYTE_5[6]
VPS_PDC_UTC_
BYTE_5[5]
VPS_PDC_UTC_
BYTE_5[4]
VPS_PDC_UTC_
BYTE_5[3]
VPS_PDC_UTC_
BYTE_5[2]
VPS_PDC_UTC_
BYTE_5[1]
VPS_PDC_UTC_
BYTE_5[0]
138
8A
VDP_VPS_
PDC_UTC_6
R
VPS_PDC_UTC_
BYTE_6[7]
VPS_PDC_UTC_
BYTE_6[6]
VPS_PDC_UTC_
BYTE_6[5]
VPS_PDC_UTC_
BYTE_6[4]
VPS_PDC_UTC_
BYTE_6[3]
VPS_PDC_UTC_
BYTE_6[2]
VPS_PDC_UTC_
BYTE_6[1]
VPS_PDC_UTC_
BYTE_6[0]
139
8B
VDP_VPS_PDC_
UTC_7
R
VPS_PDC_UTC_
BYTE_7[7]
VPS_PDC_UTC_
BYTE_7[6]
VPS_PDC_UTC_
BYTE_7[5]
VPS_PDC_UTC_
BYTE_7[4]
VPS_PDC_UTC_
BYTE_7[3]
VPS_PDC_UTC_
BYTE_7[2]
VPS_PDC_UTC_
BYTE_7[1]
VPS_PDC_UTC_
BYTE_7[0]
140
8C
VDP_VPS_PDC_
UTC_8
R
VPS_PDC_UTC_
BYTE_8[7]
VPS_PDC_UTC_
BYTE_8[6]
VPS_PDC_UTC_
BYTE_8[5]
VPS_PDC_UTC_
BYTE_8[4]
VPS_PDC_UTC_
BYTE_8[3]
VPS_PDC_UTC_
BYTE_8[2]
VPS_PDC_UTC_
BYTE_8[1]
VPS_PDC_UTC_
BYTE_8[0]
141
8D
VDP_VPS_PDC_
UTC_9
R
VPS_PDC_UTC_
BYTE_9[7]
VPS_PDC_UTC_
BYTE_9[6]
VPS_PDC_UTC_
BYTE_9[5]
VPS_PDC_UTC_
BYTE_9[4]
VPS_PDC_UTC_
BYTE_9[3]
VPS_PDC_UTC_
BYTE_9[2]
VPS_PDC_UTC_
BYTE_9[1]
VPS_PDC_UTC_
BYTE_9[0]
142
8E
VDP_VPS_PDC_
UTC_10
R
VPS_PDC_UTC_
BYTE_10[7]
VPS_PDC_UTC_
BYTE_10[6]
VPS_PDC_UTC_
BYTE_10[5]
VPS_PDC_UTC_
BYTE_10[4]
VPS_PDC_UTC_
BYTE_10[3]
VPS_PDC_UTC_
BYTE_10[2]
VPS_PDC_UTC_
BYTE_10[1]
VPS_PDC_UTC_
BYTE_10[0]
143
8F
VDP_VPS_PDC_
UTC_11
R
VPS_PDC_UTC_
BYTE_11[7]
VPS_PDC_UTC_
BYTE_11[6]
VPS_PDC_UTC_
BYTE_11[5]
VPS_PDC_UTC_
BYTE_11[4]
VPS_PDC_UTC_
BYTE_11[3]
VPS_PDC_UTC_
BYTE_11[2]
VPS_PDC_UTC_
BYTE_11[1]
VPS_PDC_UTC_
BYTE_11[0]
144
90
VDP_VPS_PDC_
UTC_12
R
VPS_PDC_UTC_
BYTE_12[7]
VPS_PDC_UTC_
BYTE_12[6]
VPS_PDC_UTC_
BYTE_12[5]
VPS_PDC_UTC_
BYTE_12[4]
VPS_PDC_UTC_
BYTE_12[3]
VPS_PDC_UTC_
BYTE_12[2]
VPS_PDC_UTC_
BYTE_12[1]
VPS_PDC_UTC_
BYTE_12[0]
146
92
VDP_VITC_DATA_0 R
VITC_DATA_0[7] VITC_DATA_0[6] VITC_DATA_0[5] VITC_DATA_0[4] VITC_DATA_0[3] VITC_DATA_0[2] VITC_DATA_0[1] VITC_DATA_0[0]
147
93
VDP_VITC_DATA_1 R
VITC_DATA_1[7] VITC_DATA_1[6] VITC_DATA_1[5] VITC_DATA_1[4] VITC_DATA_1[3] VITC_DATA_1[2] VITC_DATA_1[1] VITC_DATA_1[0]
148
94
VDP_VITC_DATA_2 R
VITC_DATA_2[7] VITC_DATA_2[6] VITC_DATA_2[5] VITC_DATA_2[4] VITC_DATA_2[3] VITC_DATA_2[2] VITC_DATA_2[1] VITC_DATA_2[0]
149
95
VDP_VITC_DATA_3 R
VITC_DATA_3[7] VITC_DATA_3[6] VITC_DATA_3[5] VITC_DATA_3[4] VITC_DATA_3[3] VITC_DATA_3[2] VITC_DATA_3[1] VITC_DATA_3[0]
150
96
VDP_VITC_DATA_4 R
VITC_DATA_4[7] VITC_DATA_4[6] VITC_DATA_4[5] VITC_DATA_4[4] VITC_DATA_4[3] VITC_DATA_4[2] VITC_DATA_4[1] VITC_DATA_4[0]
151
97
VDP_VITC_DATA_5 R
VITC_DATA_5[7] VITC_DATA_5[6] VITC_DATA_5[5] VITC_DATA_5[4] VITC_DATA_5[3] VITC_DATA_5[2] VITC_DATA_5[1] VITC_DATA_5[0]
152
98
VDP_VITC_DATA_6 R
VITC_DATA_6[7] VITC_DATA_6[6] VITC_DATA_6[5] VITC_DATA_6[4] VITC_DATA_6[3] VITC_DATA_6[2] VITC_DATA_6[1] VITC_DATA_6[0]
153
99
VDP_VITC_DATA_7 R
VITC_DATA_7[7] VITC_DATA_7[6] VITC_DATA_7[5] VITC_DATA_7[4] VITC_DATA_7[3] VITC_DATA_7[2] VITC_DATA_7[1] VITC_DATA_7[0]
154
9A
VDP_VITC_DATA_8 R
VITC_DATA_8[7] VITC_DATA_8[6] VITC_DATA_8[5] VITC_DATA_8[4] VITC_DATA_8[3] VITC_DATA_8[2] VITC_DATA_8[1] VITC_DATA_8[0]
155
9B
VDP_VITC_CALC_
CRC
R
VITC_CRC[7]
VITC_CRC[6]
VITC_CRC[5]
VITC_CRC[4]
VITC_CRC[3]
VITC_CRC[2]
VITC_CRC[1]
VITC_CRC[0]
156
9C
VDP_OUTPUT_SEL RW
I2C_GS_VPS_
PDC_UTC[1]
I2C_GS_VPS_
PDC_UTC[0]
GS_VPS_
PDC_UTC_
CB_CHANGE
WSS_CGMS_
CB_CHANGE
00110000
30
1
To access the registers listed in Table 106, SUB_USR_EN in Register Address 0x0E must be programmed to 1. 2
x in a reset value indicates do not care.