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寤犲晢锛� Microsemi SoC
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Fusion Family of Mixed Signal FPGAs
Revision 4
2-85
Voltage Monitor
The Fusion Analog Quad offers a robust set of voltage-monitoring capabilities unique in the FPGA
industry. The Analog Quad comprises three analog input pads鈥� Analog Voltage (AV), Analog Current
(AC), and Analog Temperature (AT)鈥攁nd a single gate driver output pad, Analog Gate (AG). There are
many common characteristics among the analog input pads. Each analog input can be configured to
connect directly to the input MUX of the ADC. When configured in this manner (Figure 2-66), there will be
no prescaling of the input signal. Care must be taken in this mode not to drive the ADC into saturation by
applying an input voltage greater than the reference voltage. The internal reference voltage of the ADC is
2.56 V. Optionally, an external reference can be supplied by the user. The external reference can be a
maximum of 3.3 V DC.
Figure 2-66 Analog Quad Direct Connect
Prescaler
Analog Quad
AV
AC
AT
Voltage
Monitor Block
Current
Monitor Block
AG
Digital
Input
Power
MOSFET
Gate Driver
Current
Monitor / Instr
Amplifier
Temperature
Monitor
Digital
Input
Digital
Input
Pads
To Analog MUX
To FPGA
(DAVOUTx)
To FPGA
(DACOUTx)
To FPGA
(DATOUTx)
On-Chip
Gate
Driver
Temperature
Monitor Block
Off-Chip
From FPGA
(GDONx)
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
RGM43DTBT CONN EDGECARD 86POS R/A .156 SLD
M1AFS250-1QNG180 IC FPGA 2MB FLASH 250K 180-QFN
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RSM43DTAT CONN EDGECARD 86POS R/A .156 SLD
M1A3P600-1FGG256 IC FPGA 1KB FLASH 600K 256-FBGA
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鍙冩暩(sh霉)鎻忚堪
AFS250-1QNG180I 鍔熻兘鎻忚堪:IC FPGA 2MB FLASH 250K 180-QFN RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:Fusion® 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛�
AFS250-1QNG256ES 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:Actel Fusion Mixed-Signal FPGAs
AFS250-1QNG256I 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:Actel Fusion Mixed-Signal FPGAs
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AFS250-2FG256 鍔熻兘鎻忚堪:IC FPGA 2MB FLASH 250K 256FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:Fusion® 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛�