2-24 Revision 13 Table 2-24 I/O AC Parameter Definitions Parameter Definition t
參數(shù)資料
型號: AGLE3000V5-FGG896
廠商: Microsemi SoC
文件頁數(shù): 99/166頁
文件大小: 0K
描述: IC FPGA 1KB FLASH 3M 896-FBGA
標(biāo)準(zhǔn)包裝: 27
系列: IGLOOe
邏輯元件/單元數(shù): 75264
RAM 位總計: 516096
輸入/輸出數(shù): 620
門數(shù): 3000000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 896-BGA
供應(yīng)商設(shè)備封裝: 896-FBGA(31x31)
IGLOOe DC and Switching Characteristics
2-24
Revision 13
Table 2-24 I/O AC Parameter Definitions
Parameter
Definition
tDP
Data to Pad delay through the Output Buffer
tPY
Pad to Data delay through the Input Buffer with Schmitt trigger disabled
tDOUT
Data to Output Buffer delay through the I/O interface
tEOUT
Enable to Output Buffer Tristate Control delay through the I/O interface
tDIN
Input Buffer to Data delay through the I/O interface
tPYS
Pad to Data delay through the Input Buffer with Schmitt trigger enabled
tHZ
Enable to Pad delay through the Output Buffer—HIGH to Z
tZH
Enable to Pad delay through the Output Buffer—Z to HIGH
tLZ
Enable to Pad delay through the Output Buffer—LOW to Z
tZL
Enable to Pad delay through the Output Buffer—Z to LOW
tZHS
Enable to Pad delay through the Output Buffer with delayed enable—Z to HIGH
tZLS
Enable to Pad delay through the Output Buffer with delayed enable—Z to LOW
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