Revision 13 2-105 Figure 2-52 FIFO FULL Flag and AFULL Flag Assertion Figure 2-53 FIFO EMPTY Flag and" />
參數(shù)資料
型號: AGLE3000V5-FGG896I
廠商: Microsemi SoC
文件頁數(shù): 23/166頁
文件大?。?/td> 0K
描述: IC FPGA 1KB FLASH 3M 896-FBGA
標(biāo)準(zhǔn)包裝: 27
系列: IGLOOe
邏輯元件/單元數(shù): 75264
RAM 位總計: 516096
輸入/輸出數(shù): 620
門數(shù): 3000000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 896-BGA
供應(yīng)商設(shè)備封裝: 896-FBGA(31x31)
IGLOOe Low Power Flash FPGAs
Revision 13
2-105
Figure 2-52 FIFO FULL Flag and AFULL Flag Assertion
Figure 2-53 FIFO EMPTY Flag and AEMPTY Flag Deassertion
Figure 2-54 FIFO FULL Flag and AFULL Flag Deassertion
NO MATCH
Dist = AFF_TH
MATCH (FULL)
tCKAF
tWCKFF
tCYC
WCLK
FULL
AFULL
WA/RA
(Address Counter)
WCLK
WA/RA
(Address Counter)
MATCH
(EMPTY)
NO MATCH
Dist = AEF_TH + 1
NO MATCH
RCLK
EMPTY
1st Rising
Edge
After 1st
Write
2nd Rising
Edge
After 1st
Write
tRCKEF
tCKAF
AEMPTY
Dist = AFF_TH – 1
MATCH (FULL)
NO MATCH
tWCKF
tCKAF
1st Rising
Edge
After 1st
Read
1st Rising
Edge
After 2nd
Read
RCLK
WA/RA
(Address Counter)
WCLK
FULL
AFULL
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