2-20 Revision 13 Overview of I/O Performance Summary of I/O DC Input and Output Levels – Default I/O So" />
參數(shù)資料
型號： AGLE600V2-FGG484I
廠商： Microsemi SoC
文件頁數(shù)： 95/166頁
文件大小： 0K
描述： IC FPGA 1KB FLASH 600K 484-FBGA
標準包裝： 60
系列： IGLOOe
邏輯元件/單元數(shù)： 13824
RAM 位總計： 110592
輸入/輸出數(shù)： 270
門數(shù)： 600000
電源電壓： 1.14 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 484-BGA
供應商設備封裝： 484-FPBGA（23x23）
IGLOOe DC and Switching Characteristics
2-20
Revision 13
Overview of I/O Performance
Summary of I/O DC Input and Output Levels – Default I/O Software
Settings
Table 2-21 Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial Conditions
I/O
Standard
Drive
Strength
Equivalent
Software
Default
Drive
Strength2
Slew
Rate
VIL
VIH
VOL
VOH
IOL1 IOH1
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
3.3 V
LVTTL /
3.3 V
LVCMOS
12 mA
High –0.3
0.8
2
3.6
0.4
2.4
12
3.3 V
LVCMOS
Wide
Range3
100 A
12 mA
High –0.3
0.8
2
3.6
0.2
VCCI – 0.2 0.1 0.1
2.5 V
LVCMOS
12 mA
High –0.3
0.7
1.7
3.6
0.7
1.7
12
1.8 V
LVCMOS
12 mA
High –0.3 0.35 * VCCI
0.65 * VCCI
3.6
0.45
VCCI – 0.45 12
12
1.5 V
LVCMOS
12 mA
High –0.3 0.35 * VCCI
0.65 * VCCI
3.6 0.25 * VCCI 0.75 * VCCI 12
12
1.2 V
LVCMOS
2 mA
High –0.3 0.35 * VCCI
0.65 * VCCI
3.6 0.25 * VCCI 0.75 * VCCI 2
2
1.2 V
LVCMOS
Wide
Range 4
100 A
2 mA
High –0.3 0.3 * VCCI
0.7 * VCCI
3.6
0.1
VCCI – 0.1 0.1 0.1
3.3 V PCI
Per PCI Specification
3.3 V PCI-X
Per PCI-X Specification
3.3 V GTL
20 mA5
High –0.3 VREF – 0.05 VREF + 0.05 3.6
0.4
–
20
2.5 V GTL
20 mA5
High –0.3 VREF – 0.05 VREF + 0.05 3.6
0.4
–
20
3.3 V GTL+ 35 mA
35 mA
High –0.3 VREF – 0.1
VREF + 0.1
3.6
0.6
–
35
2.5 V GTL+ 33 mA
33 mA
High –0.3 VREF – 0.1
VREF + 0.1
3.6
0.6
–
33
HSTL (I)
8 mA
High –0.3 VREF – 0.1
VREF + 0.1
3.6
0.4
VCCI – 0.4
8
Notes:
1. Currents are measured at 85°C junction temperature.
2. The minimum drive strength for any LVCMOS 1.2 V or LVCMOS 3.3 V software configuration when run in wide range is
±100 A. Drive strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the
IBIS models.
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-12 specification.
4. All LVCMOS 1.2 V software macros support LVCMOS 1.2 V wide range as specified in the JESD8-12 specification.
5. Output drive strength is below JEDEC specification.
6. Output Slew Rates can be extracted from IBIS Models, http://www.microsemi.com/soc/download/ibis/default.aspx.
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