2-14 Revision 17 Guidelines Toggle Rate Definition A toggle rate defines the frequency o" />
參數(shù)資料
型號(hào): AGLN030V5-ZQNG68
廠商: Microsemi SoC
文件頁數(shù): 75/150頁
文件大?。?/td> 0K
描述: IC FPGA NANO 1KB 30K 68-QFN
標(biāo)準(zhǔn)包裝: 260
系列: IGLOO nano
邏輯元件/單元數(shù): 768
輸入/輸出數(shù): 49
門數(shù): 30000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -20°C ~ 70°C
封裝/外殼: 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 68-QFN(8x8)
IGLOO nano DC and Switching Characteristics
2-14
Revision 17
Guidelines
Toggle Rate Definition
A toggle rate defines the frequency of a net or logic element relative to a clock. It is a percentage. If the
toggle rate of a net is 100%, this means that this net switches at half the clock frequency. Below are
some examples:
The average toggle rate of a shift register is 100% because all flip-flop outputs toggle at half of the
clock frequency.
The average toggle rate of an 8-bit counter is 25%:
– Bit 0 (LSB) = 100%
– Bit 1
= 50%
– Bit 2
= 25%
–…
– Bit 7 (MSB) = 0.78125%
– Average toggle rate = (100% + 50% + 25% + 12.5% + . . . + 0.78125%) / 8
Enable Rate Definition
Output enable rate is the average percentage of time during which tristate outputs are enabled. When
nontristate output buffers are used, the enable rate should be 100%.
Table 2-19 Toggle Rate Guidelines Recommended for Power Calculation
Component
Definition
Guideline
1
Toggle rate of VersaTile outputs
10%
2
I/O buffer toggle rate
10%
Table 2-20 Enable Rate Guidelines Recommended for Power Calculation
Component
Definition
Guideline
1
I/O output buffer enable rate
100%
2
RAM enable rate for read operations
12.5%
3
RAM enable rate for write operations
12.5%
相關(guān)PDF資料
PDF描述
AMC28DRTH-S93 CONN EDGECARD 56POS DIP .100 SLD
AMC28DREN-S93 CONN EDGECARD 56POS .100 EYELET
AMC28DREH-S93 CONN EDGECARD 56POS .100 EYELET
RCB60DHAR-S793 CONN EDGECARD 120PS DIP .05 3.3V
A3P030-1QNG48 IC FPGA 1KB FLASH 30K 48-QFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AGLN030V5-ZQNG68I 功能描述:IC FPGA NANO 1KB 30K 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
AGLN030V5-ZUCG81 功能描述:IC FPGA NANO 1KB 30K 81-UCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
AGLN030V5-ZUCG81I 功能描述:IC FPGA NANO 1KB 30K 81-UCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
AGLN030V5-ZVQ100 功能描述:IC FPGA NANO 1KB 30K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
AGLN030V5-ZVQ100I 功能描述:IC FPGA NANO 1KB 30K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計(jì):- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)