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參數(shù)資料
| 型號： | AM29LV081B-90EK |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 8 Megabit (1 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory |
| 中文描述： | 8兆位（1米× 8位）的CMOS 3.0伏特，只有統(tǒng)一部門閃存 |
| 文件頁數(shù)： | 12/40頁 |
| 文件大?。?/td> | 438K |
| 代理商： | AM29LV081B-90EK |
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10
Am29LV081B
21525D6
October 12, 2006
DA T A S HE E T
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hard-
ware sector unprotection feature re-enables both pro-
gram and erase operations in previously protected
sectors. Sector protection/unprotection can be imple-
mented via two methods.
The primary method requires V
ID
on the RESET# pin
only, and can be implemented either in-system or via
programming equipment. Figure 2 shows the algo-
rithms and Figure 21 shows the timing diagram. This
method uses standard microprocessor bus cycle tim-
ing. For sector unprotect, all unprotected sectors must
first be protected prior to the first sector unprotect write
cycle.
The alternate method intended only for programming
equipment requires V
ID
on address pin A9, OE#, and
RESET#. This method is compatible with programmer
routines written for earlier 3.0 volt-only AMD flash de-
vices. Publication number 21225 contains further de-
tails; contact an AMD representative to request a copy.
The device is shipped with all sectors unprotected.
AMD offers the option of programming and protecting
sectors at its factory prior to shipping the device
through AMD’s ExpressFlash Service. Contact an
AMD representative for details.
It is possible to determine whether a sector is protected
or unprotected. See “Autoselect Mode” for details.
Temporary Sector Unprotect
This feature allows temporary unprotection of previ-
ously protected sectors to change data in-system. The
Sector Unprotect mode is activated by setting the RE-
SET# pin to V
ID
. During this mode, formerly protected
sectors can be programmed or erased by selecting the
sector addresses. Once V
ID
is removed from the RE-
SET# pin, all the previously protected sectors are
protected again. Figure 1 shows the algorithm, and
Figure 20 shows the timing diagrams, for this feature.
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Table 4 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
CC
power-up and
power-down transitions, or from system noise.
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not ac-
cept any write cycles. This protects data during V
CC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the
proper signals to the control pins to prevent uninten-
tional writes when V
CC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
IL
, CE# = V
IH
or WE# = V
IH
. To initiate a write cycle,
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
IL
and OE# = V
IH
during power up, the
device does not accept commands on the rising edge
of WE#. The internal state machine is automatically
reset to reading array data on power-up.
Figure 1. Temporary Sector Unprotect Operation
START
Perform Erase or
Program Operations
RESET# = V
IH
Temporary Sector
Unprotect Completed
(Note 2)
RESET# = V
ID
(Note 1)
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once
again.
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