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參數(shù)資料
| 型號： | AM29PDLI27H63PCI |
| 廠商： | Spansion Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control |
| 中文描述： | 128兆位（8米× 16位），3.0伏的CMOS只，頁面模式同步讀/寫閃存與增強VersatileIO控制記憶 |
| 文件頁數(shù)： | 58/68頁 |
| 文件大小： | 750K |
| 代理商： | AM29PDLI27H63PCI |
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56
Am29PDL127H
June 30, 2003
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
OE#
CE#
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
RY/BY#
Note:
1. VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read
cycle, and array data read cycle.
Figure 20.
Toggle Bit Timings (During Embedded Algorithms)
Note:
1. DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle
DQ2 and DQ6.
Figure 21.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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