參數(shù)資料
型號(hào)： AM29SL160CB-100EFN
廠商： Advanced Micro Devices, Inc.
英文描述： 16 Megabit CMOS 1.8 Volt-only Super Low Voltage Flash Memory
中文描述： 16兆位的CMOS 1.8伏只超低電壓快閃記憶體
文件頁數(shù)： 5/52頁
文件大小： 1232K
代理商： AM29SL160CB-100EFN
November 1, 2004
Am29SL160C
5
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .7
Special Handling Instructions for FBGA Packages ..................8
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . .9
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Ordering Information . . . . . . . . . . . . . . . . . . . . . .10
Table 1. Am29SL160C Device Bus Operations .............................11
Word/Byte Configuration ........................................................11
Requirements for Reading Array Data ...................................11
Writing Commands/Command Sequences ............................12
Accelerated ProgramOperation .............................................12
Programand Erase Operation Status ....................................12
Standby Mode ........................................................................12
Automatic Sleep Mode ...........................................................12
RESET#: Hardware Reset Pin ...............................................12
Output Disable Mode ..............................................................13
Table 2. Am29SL160CT Top Boot Sector Architecture ..................14
Table 3. Am29SL160CB BottomBoot Sector Architecture .............15
Autoselect Mode .....................................................................16
Table 4. Am29SL160C Autoselect Codes (High Voltage Method) ..16
Sector/Sector Block Protection and Unprotection ..................17
Table 5. Top Boot Sector/Sector Block Addresses
forProtection/Unprotection .............................................................17
Table 6. BottomBoot Sector/Sector Block
Addresses forProtection/Unprotection ...........................................17
Write Protect (WP#) ................................................................18
Temporary Sector Unprotect ..................................................18
Figure 1. In-SystemSector Protect/Unprotect Algorithms.............. 19
Figure 2. Temporary Sector Unprotect Operation........................... 20
Secured Silicon (SecSi) Sector Flash Memory Region ..........20
Table 7. SecSi Sector Addresses ...................................................20
Hardware Data Protection ......................................................20
Low V
CC
Write Inhibit ..............................................................20
Write Pulse “Glitch” Protection ...............................................20
Logical Inhibit ..........................................................................20
Power-Up Write Inhibit ............................................................20
Common Flash Memory Interface (CFI). . . . . . . 21
Table 8. CFI Query Identification String ..........................................21
Table 9. SystemInterface String .....................................................22
Table 10. Device Geometry Definition ............................................22
Table 11. Primary Vendor-Specific Extended Query ......................23
Command Definitions . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ................................................................23
Reset Command .....................................................................23
Autoselect Command Sequence ............................................24
Enter SecSi Sector/Exit SecSi Sector Command Sequence ..24
Word/Byte ProgramCommand Sequence .............................24
Unlock Bypass Command Sequence .....................................24
Figure 3. ProgramOperation.......................................................... 25
Chip Erase Command Sequence ...........................................26
Sector Erase Command Sequence ........................................26
Erase Suspend/Erase Resume Commands ...........................26
Figure 4. Erase Operation.............................................................. 27
Command Definitions .............................................................28
Table 12. Am29SL160C Command Definitions .............................28
Write Operation Status . . . . . . . . . . . . . . . . . . . . 29
DQ7: Data#Polling .................................................................29
Figure 5. Data#Polling Algorithm.................................................. 29
RY/BY#: Ready/Busy#............................................................30
DQ6: Toggle Bit I ....................................................................30
DQ2: Toggle Bit II ...................................................................30
Reading Toggle Bits DQ6/DQ2 ...............................................30
DQ5: Exceeded Timng Limts ................................................31
DQ3: Sector Erase Timer .......................................................31
Figure 6. Toggle Bit Algorithm........................................................ 31
Table 13. Write Operation Status ...................................................32
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 33
Figure 7. MaximumNegative OvershootWaveform...................... 33
Figure 8. MaximumPositive OvershootWaveform........................ 33
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 33
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 9. I
Current vs. Time (Showing Active and Automatic
SleepCurrents).............................................................................. 35
Figure 10. Typical I
CC1
vs. Frequency............................................ 35
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 11. Test Setup..................................................................... 36
Table 14. Test Specifications .........................................................36
Figure 12. Input Waveforms and Measurement Levels................. 36
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 37
Read Operations ....................................................................37
Figure 13. Read Operations Timngs............................................. 37
Hardware Reset (RESET#) ....................................................38
Figure 14. RESET#Timngs.......................................................... 38
Word/Byte Configuration (BYTE#) ........................................39
Figure 15. BYTE#Timngs for Read Operations............................ 39
Figure 16. BYTE#Timngs for Write Operations............................ 39
Erase/ProgramOperations .....................................................40
Figure 17. ProgramOperation Timngs.......................................... 41
Figure 18. Chip/Sector Erase Operation Timngs.......................... 42
Figure 19. Data# Polling Timngs (During Embedded Algorithms). 43
Figure 20. Toggle Bit Timngs (During Embedded Algorithms)...... 43
Figure 21. DQ2 vs. DQ6................................................................. 44
Figure 22. Temporary Sector Unprotect Timng Diagram.............. 44
Figure 23. Accelerated ProgramTimng Diagram.......................... 45
Figure 24. Sector Protect/Unprotect Timng Diagram.................... 45
Figure 25. Alternate CE#Controlled Write Operation Timngs...... 47
Erase And Programming Performance . . . . . . . 48
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 48
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 48
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . 49
TS 048—48-Pin Standard TSOP ............................................49
FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA)
8 x 9 mmpackage ..................................................................50
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 51
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