- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366538 > AM41DL6408H8H85IT (Advanced Micro Devices, Inc.) Stacked Multi-Chip Package (MCP) Flash Memory and SRAM PDF資料下載
參數(shù)資料
| 型號： | AM41DL6408H8H85IT |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | SRAM |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | 堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 33/66頁 |
| 文件大?。?/td> | 1123K |
| 代理商： | AM41DL6408H8H85IT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
November 24, 2003
Am41DL6408H
31
A D V A N C E I N F O R M A T I O N
Table 14.
Am29DL640H Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE#f pulse, whichever happens
later.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE#f pulse, whichever happens first.
SADD = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A21–A12 uniquely select any sector. Refer to
Table 5 for information on sector addresses.
BA = Address of the bank that is being switched to autoselect mode, is
in bypass mode, or is being erased. Address bits A21–A19 select a
bank. Refer to Table 6 for information on sector addresses.
Notes:
1.
2.
3.
See Tables 1 to 3 for description of bus operations.
All values are in hexadecimal.
Except for the read cycle and the fourth cycle of the autoselect
command sequence, all bus cycles are write cycles.
Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD and PD.
Unless otherwise noted, address bits A21–A12 are don’t cares for
unlock and command cycles, unless SADD or PA is required.
No unlock or command cycles required when bank is reading
array data.
The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when a bank is in the autoselect mode, or if DQ5 goes high (while
the bank is providing status information).
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer ID, device ID, or SecSi Sector factory protect
information. Data bits DQ15–DQ8 are don’t care. See the
Autoselect Command Sequence section for more information.
4.
5.
6.
7.
8.
9.
The device ID must be read across the fourth, fifth, and sixth
cycles.
10. The data is 80h for factory locked, 40h for customer locked and
00h for not locked.
11. The data is 00h for an unprotected sector/sector block and 01h for
a protected sector/sector block.
12. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
13. The Unlock Bypass Reset command is required to return to the
read mode when the bank is in the unlock bypass mode.
14. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
15. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
16. Command is valid when device is ready to read array data or when
device is in autoselect mode.
Command
Sequence
(Note 1)
C
1
1
Bus Cycles (Notes 2–5)
Third
Addr
Data
First
Second
Addr
Fourth
Addr
Fifth
Sixth
Addr
RA
XXX
555
AAA
555
AAA
555
AAA
Data
RD
F0
Data
Data
Addr
Data
Addr
Data
Read (Note 6)
Reset (Note 7)
A
Manufacturer ID
Word
Byte
Word
Byte
Word
Byte
4
AA
2AA
555
2AA
555
2AA
555
55
(BA)555
(BA)AAA
(BA)555
(BA)AAA
(BA)555
(BA)AAA
90
(BA)X00
01
Device ID (Note 9)
6
AA
55
90
(BA)X01
(BA)X02
(BA)X03
(BA)X06
(SADD)
X02
(SADD)
X04
7E
(BA)X0E
(BA)X1C
02
(BA)X0F
(BA)X1E
01
SecSi Sector Factory
Protect (Note 10)
4
AA
55
90
80/00
Sector/Sector Block
Protect Verify
(Note 11)
Word
4
555
AA
2AA
55
(BA)555
90
00/01
Byte
AAA
555
(BA)AAA
Enter SecSi Sector Region
Word
Byte
Word
Byte
Word
Byte
Word
Byte
3
555
AAA
555
AAA
555
AAA
555
AAA
XXX
XXX
555
AAA
555
AAA
BA
BA
55
AA
AA
2AA
555
2AA
555
2AA
555
2AA
555
PA
XXX
2AA
555
2AA
555
55
555
AAA
555
AAA
555
AAA
555
AAA
88
Exit SecSi Sector Region
4
AA
55
90
XXX
00
Program
4
AA
55
A0
PA
PD
Unlock Bypass
3
AA
55
20
Unlock Bypass Program (Note 12)
Unlock Bypass Reset (Note 13)
2
2
A0
90
PD
00
Chip Erase
Word
Byte
Word
Byte
6
AA
55
555
AAA
555
AAA
80
555
AAA
555
AAA
AA
2AA
555
2AA
555
55
555
AAA
10
Sector Erase
6
AA
55
80
AA
55
SADD
30
Erase Suspend (Note 14)
Erase Resume (Note 15)
1
1
B0
30
CFI Query (Note 16)
Word
Byte
1
98
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM41LV3204MB10IT | Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41LV3204MT10IT | Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41PDS3224DT110IT | 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41PDS3224DB100IS | 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41PDS3224DB100IT | 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM41LV3204M | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41LV3204MB10I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41LV3204MB10IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41LV3204MB10IT | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
| AM41LV3204MT10I | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。