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參數(shù)資料
| 型號： | AM45DL32X8G |
| 英文描述： | 200NS, FLATPACK, 883C; LEV B COMPLIANT(EEPROM) |
| 中文描述： | Am45DL32x8G -堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 31/64頁 |
| 文件大?。?/td> | 1191K |
| 代理商： | AM45DL32X8G |
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Am45DL32x8G
August 28, 2002
P R E L I M I N A R Y
termine the status of the erase operation by reading
DQ7, DQ6, DQ2, or RY/BY# in the erasing bank.
Refer to the Flash Write Operation Status section for
information on these status bits.
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other com-
mands are ignored. However, note that a
hardware
reset
immediately
terminates the erase operation. If
that occurs, the sector erase command sequence
should be reinitiated once that bank has returned to
reading array data, to ensure data integrity.
Figure 4
illustrates the algorithm for the erase opera-
tion. Refer to the Flash Erase and Program Opera-
tions tables in the AC Characteristics section for
parameters, and
Figure 20
section for timing dia-
grams.
Erase Suspend/Erase Resume
Commands
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected
for erasure. The bank address is required when writing
this command. This command is valid only during the
sector erase operation, including the 80 μs time-out
period during the sector erase command sequence.
The Erase Suspend command is ignored if written dur-
ing the chip erase operation or Embedded Program
algorithm.
When the Erase Suspend command is written during
the sector erase operation, the device requires a max-
imum of 20 μs to suspend the erase operation. How-
ever, when the Erase Suspend command is written
during the sector erase time-out, the device immedi-
ately terminates the time-out period and suspends the
erase operation. Addresses are
“
don
’
t-cares
”
when
writing the Erase suspend command.
After the erase operation has been suspended, the
bank enters the erase-suspend-read mode. The sys-
tem can read data from or program data to any sector
not selected for erasure. (The device
“
erase sus-
pends
”
all sectors selected for erasure.) Reading at
any address within erase-suspended sectors pro-
duces status information on DQ7
–
DQ0. The system
can use DQ7, or DQ6 and DQ2 together, to determine
if a sector is actively erasing or is erase-suspended.
Refer to the Flash Write Operation Status section for
information on these status bits.
After an erase-suspended program operation is com-
plete, the bank returns to the erase-suspend-read
mode. The system can determine the status of the
program operation using the DQ7 or DQ6 status bits,
just as in the standard Byte Program operation.
Refer to the Flash Write Operation Status section for
more information.
In the erase-suspend-read mode, the system can also
issue the autoselect command sequence. The device
allows reading autoselect codes even at addresses
within erasing sectors, since the codes are not stored
in the memory array. When the device exits the au-
toselect mode, the device reverts to the Erase Sus-
pend mode, and is ready for another valid operation.
Refer to the Sector/Sector Block Protection and Un-
protection and Autoselect Command Sequence sec-
tions for details.
To resume the sector erase operation, the system
must write the Erase Resume command (address bits
are don
’
t care). The bank address of the erase-sus-
pended bank is required when writing this command.
Further writes of the Resume command are ignored.
Another Erase Suspend command can be written after
the chip has resumed erasing.
Figure 4.
Erase Operation
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
Notes:
1. See Tables
16
and
18
for erase command sequence.
2. See the section on DQ3 for information on the sector
erase timer.
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