參數(shù)資料
型號： AM45DL32X8G
英文描述： 200NS, FLATPACK, 883C; LEV B COMPLIANT(EEPROM)
中文描述： Am45DL32x8G -堆疊式多芯片封裝（MCP）閃存和SRAM
文件頁數(shù)： 57/64頁
文件大?。?/td> 1191K
代理商： AM45DL32X8G
56
Am45DL32x8G
August 28, 2002
P R E L I M I N A R Y
CompactCell SRAM AC CHARACTERISTICS
Read Cycle
Notes:
1. WE# = V
IH
, if CIOs is low, ignore UB#s/LB#s timing.
2. t
and t
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
3. At any given temperature and voltage condition, t
HZ
(Max.) is less than t
LZ
(Min.) both for a given device and from device to device
interconnection.
4. Do not access device with cycle timing shorter than t
RC
for continuous periods < 10 μs.
Figure 29.
CompactCell SRAM Read Cycle
Data Valid
High-Z
t
RC
CE#1s
Address
OE#
Data Out
t
OH
t
AA
t
CO1
t
OE
t
OLZ
t
BLZ
t
LZ
t
OHZ
t
HZ
CE2s
t
CO2
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