- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄362278 > AM50DL128CG 2 x 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 64 Mbit (2 M x 16-Bit) Pseudo Static RAM (Preliminary) PDF資料下載
參數(shù)資料
| 型號： | AM50DL128CG |
| 英文描述： | 2 x 64 Mbit (8 M x 8-Bit/4 M x 16-Bit) CMOS and 64 Mbit (2 M x 16-Bit) Pseudo Static RAM (Preliminary) |
| 中文描述： | 2 × 64兆位（8米× 8位/ 4米× 16位）的CMOS和64兆位（2米× 16位），偽靜態(tài)存儲器（初步） |
| 文件頁數(shù)： | 47/70頁 |
| 文件大?。?/td> | 1042K |
| 代理商： | AM50DL128CG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁當(dāng)前第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁
46
Am50DL9608G
May 19, 2003
P R E L I M I N A R Y
PSEUDO SRAM DC AND
OPERATING CHARACTERISTICS
Notes:
1. T
A
= –40
°
to 85
°
C, otherwise specified.
2. Overshoot: V
CC
+1.0V if pulse width
≤
20 ns.
3. Undershoot: –1.0V if pulse width
≤
20 ns.
4. Overshoot and undershoot are sampled, not 100% tested.
5. Stable power supply required 200 μs before device operation.
Figure 12.
Standby Current ISB CMOS
Note:
1.
2.
3.
At 70
°
, for reference only
Not 100% tested
Sample Size of 5
Parameter
Symbol
Parameter Description
Test Conditions
Min
Typ
Max
Unit
I
LI
Input Leakage Current
V
IN
= V
SS
to V
CC
CE1#s = V
IH
, CE2s = V
IL
or OE# =
V
IH
or WE# = V
IL
, V
IO
= V
SS
to V
CC
Cycle time = 1 μs, 100% duty,
I
IO
= 0 mA, CE1#s
≤
0.2 V,
CE2
≥
V
CC
– 0.2 V, V
IN
≤
0.2 V or
V
IN
≥
V
CC
– 0.2 V
Cycle time = Min., I
IO
= 0 mA,
100% duty, CE1#s = V
IL
, CE2s =
V
IH
, V
IN
= V
IL
= or V
IH
–1.0
1.0
μA
I
LO
Output Leakage Current
–1.0
1.0
μA
I
CC1
s
Average Operating Current
3
5
mA
I
CC2
s
Average Operating Current
12
25
mA
V
IL
Input Low Voltage
–0.2
(Note 3)
0.4
V
V
IH
Input High Voltage
2.2
V
CC
+0.2
(Note 2)
V
V
OL
Output Low Voltage
I
OL
= 2.0 mA
0.4
V
V
OH
Output High Voltage
I
OH
= –1.0 mA
CE1#s = V
IH
,
CE2 = V
IL
, Other
inputs = V
IH
or V
IL
CE1#s
=
V
IH
, CE2
=
V
IL:
Other inputs = V
IH
or V
IL:
t
A
= 85
°
C, V
CC
= 3.0 V
CE1#s
=
V
IH
, CE2
=
V
IL:
Other inputs = V
IH
or V
IL:
t
A
= 85
°
C, V
CC
= 3.3 V
2.2
V
I
SB
Standby Current (TTL)
0.3
mA
I
SB1
Standby Current (CMOS)
60
μA
I
SB2
Standby Current (CMOS)
85
μA
55
50
45
40
2.7
2.8
2.9
I
SB
CMOS
(μA)
V
CC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM50DL128CH | Am50DL128CH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM52-0001 | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0001SMB | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0001TR | 1.2 W High Efficiency Power Amplifier 800 - 960 MHz |
| AM52-0002 | Industrial Control IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM50DL128CG70IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CG70IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CG85IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CG85IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am50DL128CH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。