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參數資料
| 型號： | AM79C90PC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CMOS Local Area Network Controller for Ethernet (C-LANCE) |
| 中文描述： | 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PDIP48 |
| 封裝： | PLASTIC, DIP-48 |
| 文件頁數： | 12/62頁 |
| 文件大?。?/td> | 437K |
| 代理商： | AM79C90PC |
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AMD
P R E L I M I N A R Y
1
2
Am79C90
Address of Receive Buffer 1
Buffer 1 Status
Buffer 1 Byte Count
Buffer 1 Message Count
2
2
2
2
N
N
N
N
Receive Descriptor Ring
Data
Packet
1
Data
Packet
2
Data
Packet
N
Pointer to Initialization Block
C-LANCE CSR Registers
Initialization
Block
Mode of Operation
Physical Address
Logical Address Filter
Pointer to Receive Ring
Number of Receive Entries (N)
Pointer to Transmit Ring
Number of Transmit Entries (M)
Address of Transmit Buffer 1
Buffer 1 Status
Buffer 1 Byte Count
Buffer 1 Error Status
2
2
2
2
M
M
M
M
Transmit Descriptor Ring
Receive Buffer
Transmit Buffer
Data
Packet
1
Data
Packet
2
Data
Packet
M
17881B-8
Figure 2-2. C-LANCE Memory Management
Buffer Management
A key feature of the C-LANCE and its on-board DMA
channel is the flexibility and speed of communication
between the C-LANCE and the host microprocessor
through common memory locations. The basic organi-
zation of the buffer management is a circular queue of
tasks in memory called descriptor rings as shown in
Figures 2-1 and 2-2. There are separate descriptor rings
to describe transmit and receive operations. Up to 128
tasks may be queued up on a descriptor ring awaiting
execution by the C-LANCE. Each entry in a descriptor
ring holds a pointer to a data memory buffer and an entry
for the length of the data buffer. Data buffers can be
chained or cascaded to handle a long packet in multiple
data buffer areas. The C-LANCE searches the descrip-
tor rings in a “l(fā)ookahead” manner to determine the next
empty buffer in order to chain buffers together or to han-
dle back-to-back packets. As each buffer is filled,
the“own” bit is reset, allowing the host processor to
process the data in the buffer.
C-LANCE Interface
CSR bits such as ACON, BCON and BSWP are used for
programming the pin functions used for different inter-
facing schemes. For example, ACON is used to pro-
gram the polarity of the Address Strobe signal
(ALE/
AS
).
BCON is used for programming the pins, for handling
either the BYTE/
WORD
method for addressing word or-
ganized, byte addressable memories where the BYTE
signal is decoded along with the least significant ad-
dress bit to determine upper or lower byte, or an explicit
scheme in which two signals labeled as BYTE MASK
(
BM
0 and
BM
1) indicate which byte is addressed. When
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相關代理商/技術參數 |
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| AM79C90PCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C90PCTR | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:CMOS Local Area Network Controller for Ethernet (C-LANCE) |
| AM79C90WW WAF | 制造商:Advanced Micro Devices 功能描述: |
| AM79C930 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| AM79C930EVAL-HW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C930EVAL-HW - PCnet-Mobile Evaluation Kit |
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